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Intel XScale® Core Developer's Manual
Optimization Guide
A.3.3
Optimizing the Use of Immediate Values
The Intel XScale
(constant) value into a register. Please refer to the
of immediate values that can be used in a MOV or MVN instruction. It is also possible to generate
a whole set of constant values using a combination of MOV, MVN, ORR, BIC, and ADD
instructions. The LDR instruction has the potential of incurring a cache miss in addition to
polluting the data and instruction caches. The code samples below illustrate cases when a
combination of the above instructions can be used to set a register to a constant value:
;Set the value of r0 to 127
mov
;Set the value of r0 to 0xfffffefb.
mvn
;Set the value of r0 to 257
mov
orr
;Set the value of r0 to 0x51f
mov
orr
;Set the value of r0 to 0xf100ffff
mvn
bic
; Set the value of r0 to 0x12341234
mov
orr
add
Note: It is possible to load any 32-bit value into a register using a sequence of four instructions.
188
®
core MOV or MVN instruction should be used when loading an immediate
r0, #127
r0, #260
r0, #1
r0, r0, #256
r0, #0x1f
r0, r0, #0x500
r0, #0xff, 16
r0, r0, #0xe, 8
r0, #0x8d, 30
r0, r0, #0x1, 20
r0, r0, r0, LSL #16 ; shifter delay of 1 cycle
January, 2004
ARM Architecture Reference Manual
for the set
Developer's Manual
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