Data And Mini Cache; Non Cacheable Regions; Write-Through And Write-Back Cached Memory Regions - Intel XScale Core Developer's Manual

A.4.2

Data and Mini Cache

The Intel XScale
by the user (see
•
Non Cacheable with no coalescing of memory writes.
•
Non Cacheable with coalescing of memory writes.
•
Mini-Data cache with write coalescing, read allocate, and write-back caching.
•
Mini-Data cache with write coalescing, read allocate, and write-through caching.
•
Mini-Data cache with write coalescing, read-write allocate, and write-back caching.
•
Data cache with write coalescing, read allocate, and write-back caching.
•
Data cache with write coalescing, read allocate, and write-through caching.
•
Data cache with write coalescing, read-write allocate, and write-back caching.
To support allocating variables to these various memory regions, the tool chain (compiler,
assembler, linker and debugger), must implement named sections.
The performance of your application code depends on what cache policy you are using for data
objects. A description of when to use a particular policy is described below.
The Intel XScale
the operation is requires considerable processing time and therefore should not be used by
applications.
If the application is running under an OS, then the OS may restrict you from using certain cache
policies.
A.4.2.1.

Non Cacheable Regions

It is recommended that non-cache memory (X=0, C=0, and B=0) be used only if necessary as is
often necessary for I/O devices. Accessing non-cacheable memory is likely to cause the processor
to stall frequently due to the long latency of memory reads.
A.4.2.2.

Write-through and Write-back Cached Memory Regions

Write through memory regions generate more data traffic on the bus. Therefore is not recommended
that the write-through policy be used. The write back policy must be used whenever possible.
However, in a multiprocessor environment it will be necessary to use a write through policy if data
is shared across multiple processors. In such a situation all shared memory regions should use write
through policy. Memory regions that are private to a particular processor should use the write back
policy.
Developer's Manual
®
core allows the user to define memory regions whose cache policies can be set
Section 6.2.3, "Cache Policies"). Supported policies and configurations are:
®
core allows dynamic modification of the cache policies at run time, however,
January, 2004
Intel XScale® Core Developer's Manual
Optimization Guide
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