Mdio User Command Complete Interrupt Mask Set Register (Userintmaskset); Mdio User Command Complete Interrupt Mask Set Register (Userintmaskset) Field Descriptions - Texas Instruments TMS320C6A816 Series Technical Reference Manual

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3.3.3.9

MDIO User Command Complete Interrupt Mask Set Register (USERINTMASKSET)

The MDIO user command complete interrupt mask set register (USERINTMASKSET) is shown in
Figure 3-84 and described in
Figure 3-84. MDIO User Command Complete Interrupt Mask Set Register (USERINTMASKSET)
31
15
LEGEND: R = Read only; R/W = Read/Write; W1S = Write 1 to set, write of 0 has no effect; -n = value after reset
Table 3-84. MDIO User Command Complete Interrupt Mask Set Register (USERINTMASKSET)
Bit Field
31-2 Reserved
1-0 USERINTMASKSET
SPRUGX9 – 15 April 2011
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Preliminary
Table 3-84.
Reserved
Reserved
R-0
Field Descriptions
Value Description
0 Reserved.
0-3h MDIO user interrupt mask set for USERINTMASKED[1:0], respectively. Setting a bit to 1 will
enable MDIO user command complete interrupts for that particular USERACCESS register.
MDIO user interrupt for a particular USERACCESS register is disabled if the corresponding bit
is 0. USERINTMASKSET[0] and USERINTMASKSET[1] correspond to USERACCESS0 and
USERACCESS1, respectively. Writing a 0 to this register has no effect.
0 MDIO user command complete interrupts for the MDIO user access register n
(USERACCESSn) are disabled.
1 MDIO user command complete interrupts for the MDIO user access register n
(USERACCESSn) are enabled.
© 2011, Texas Instruments Incorporated
R-0
Registers
16
2 1 0
USERINTMASKSET
R/W1S-0
521
EMAC/MDIO Module