Epson S1C17624 Technical Manual page 81

Cmos 16-bit single chip microcontroller
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Writing 1 to RTCADJ causes the RTC to operate as follows:
• When the 10-second counter is 3 or more, the RTC generates a carry over of 1 to start counting by the 1-minute
counter.
• When the 10-second counter is 2 or less, the RTC does not generate a carry over of 1.
After RTCADJ is set to 1, it remains set for the 4-ms period required for this processing, then automatically returns
to 0. To check whether the 30-second correction processing has completed or not, [A] repeat checking RTCADJ or
[B] check RTCADJ after waiting for 4 ms.
Accessing the counters while RTCADJ = 1 is prohibited. Writing 0 to RTCADJ and writing 1 to RTCRST are also
prohibited, because it would cause the RTC to operate erratically.
Writing 1 to RTCADJ when RTCBSY is 1 may corrupt the counter values. Always make sure that RTCBSY is set
to 0 before writing 1 to RTCADJ.
a
RTCHLD ← 1
RTCBSY read
RTCBSY = 0?
Yes
RTCADJ ← 1
RTCHLD ← 0
RTCADJ read
RTCADJ = 0?
Yes
8.3.7
Counter Read
In order to prevent carry over during reading counters, the RTC includes a read buffer to hold counter data.
Before reading counter data, set RTCRDHLD/RTC_CNTL1 register to 1 to load the current counter data to the read
buffer.
While RTCRDHLD is set to 1, the buffered data is read out from the counter registers. Be sure to reset RTCRD-
HLD to 0 after the buffered data is read out. This operation does not affect the counters. The counters keeps count-
ing while RTCRDHLD is set to 1.
note: At least three system clock cycles are required before the counter data can be read after data is
written to the counter.
S1C17624/604/622/602/621 TeChniCal Manual
No
No
Figure 8.
3.6.1 Procedure for Executing 30-second Correction
RTCRDHLD ← 1
Register read
RTCRDHLD ← 0
Figure 8.
3.7.1 Procedure for Reading Counters
Seiko epson Corporation
8 Real-TiMe ClOCK (RTC)
B
RTCHLD ← 1
RTCBSY read
No
RTCBSY = 0?
Yes
RTCADJ ← 1
RTCHLD ← 0
RTCADJ read
No
RTCADJ = 0?
Yes
4 ms wait
4 ms wait
8-7

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