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Code no.
Page
411914803
3-6
Memory map: Embedded RAM
(Old) The S1C17624/604 enables the RAM size used to apply restrictions to 8KB, 4KB, or 2KB. The
(New) The S1C17624/604 enables the RAM size used to apply restrictions to 8KB, 4KB, or 2KB. The
12-6
T16E: Precautions
(Old) No description
(New) (4) Be sure to set T16EDF[3:0]/T16E_DFx register to 0x0 (PCLK•1/1) when using fine mode.
13-15
T16A2: T16A Counter Ch.x Control Registers (T16A_CTLx) - (D3) CBUFEN: Compare Buffer Enable Bit
(Old) Note: Make sure the counter is halted (PRUN = 0) before setting PRESET.
(New) Note: Make sure the counter is halted (CLKEN/T16A_CLKx register = 0) before setting PRESET.
27-4
DBG: IRAM Size Select Register (MISC_IRAMSZ) (S1C17602, S1C17621) - (D[2:0]) RAMSZ[2:0]: IRAM
Size Select Bits
Modified the register tables and Table 27.4.2 (RAMSZ[2:0] settings → reserved)
AP-D-1
Initialization routine
(Old) ; ----- Stack pointer --------------------
(New) ; ----- Stack pointer --------------------
S1C17602 enables the RAM size used to apply restrictions to 4KB or 2KB. For example, when using
the S1C17624/604/602 to develop an application for a built-in ROM model ...
S1C17622 enables the RAM size used to apply restrictions to 4KB or 2KB. For example, when using
the S1C17624/604/622 to develop an application for a built-in ROM model ...
Xld.a %sp, 0x0f00
; S1C17622/602
;Xld.a %sp, 0x1f00
; S1C17624/604
Xld.a %sp, 0x0fc0
; S1C17622/602
;Xld.a %sp, 0x1fc0
; S1C17624/604
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