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Code no.
Page
411914901
21-2
(Old) When this function is enabled, a Low pulse (five peripheral module clock (PCLK) cycles or more
(New) When this function is enabled, a low pulse (One peripheral module clock (PCLK) cycles or more
21-3
(Old) No description
(New) Note that the data setup time ... depending on the I2CS module operating clock (PCLK) frequency.
21-4
I2CS: Starting data transfer
(Old) Both BUSY and SELECTED are maintained at 1 until a stop condition is detected.
(New) BUSY is maintained at 1 until a stop condition is detected. SELECTED is maintained at 1 until a
21-4, 21-5,
I2CS: Data transmission
21-10
(Old) No description
(New) When the asynchronous address detection function is used, ... after TXEMP has been set to 1.
21-6
I2CS: Note on data transmission
(Old) Note: If the I2CS module has sent back a NAK as the response to the address sent by the master ...
Modified Figures 21.5.5 to 21.5.8
21-9
(Old) 7. DA_STOP/I2CS_STAT ... if a stop condition is detected ... as the slave device.
(New) 7. DA_STOP/I2CS_STAT register: This bit is set to 1 if a stop condition or a repeated start condition
21-15
I2CS: I
(Old) Indicates that a stop condition is detected.
(New) Indicates that a stop condition or a repeated start condition is detected.
I2CS: I
(Old) After SELECTED is set to 1, it is reset to 0 when a stop condition is detected.
(New) After SELECTED is set to 1, it is reset to 0 ... or a repeated start condition is detected.
24-1
ADC: ADC10 module overview
(Old) Sampling rate: Max. 100 ksps
(New) Sampling rate: f
24-5
ADC: Expression for calculating sampling rate
(Old) No description
(New) The following shows the relation between sampling time and sampling rate.
24-12
ADC: A/D Control/Status Register (ADC10_CTL) - (D1) ADCTL: A/D Conversion Control Bit
(Old) When ADEN is 0 (A/D conversion disabled), ADCTL is fixed to 0, with no trigger accepted.
29-5
Electrical characteristics: Oscillation characteristics - OSC3 crystal oscillation
(Old) Unless otherwise specified: V
(New) Unless otherwise specified: V
Electrical characteristics: Oscillation characteristics - OSC3 ceramic oscillation
(Old) Unless otherwise specified: V
(New) Unless otherwise specified: V
29-6
Electrical characteristics: Oscillation characteristics - IOSC oscillation frequency-temperature characteristic
(Old) f
(New) f
29-9
Electrical characteristics: LCD driver characteristics - LCD drive voltage (V
(Old) Unless otherwise specified: V
(New) Unless otherwise specified: V
29-13
Electrical characteristics: S1C17624/604/622 R/F converter current consumption, S1C17602/621 R/F con-
verter current consumption
(Old) Unless otherwise specified: ... PCKEN[1:0] = 0x3 (ON), ... R
(New) Unless otherwise specified: ... PCKEN[1:0] = 0x0 (OFF), ... R
pulse width is required) input to the #BFR pin sets BFREQ/I2CS_STAT register to 1.
pulse width is required. Two PCLK clock cycles or more pulse width is recommended.) input to the
#BFR pin sets BFREQ/I2CS_STAT register to 1.
stop condition or repeated start condition is detected.
1. More than one slave device is connected to the I
4. The I2CS module is placed into transfer standby state ... used as the operating clock (PCLK).
1. The transfer rate is set to 320 kbps or higher. ...
3. The I2CS module is placed into transfer standby state ... used as the operating clock (PCLK).
is detected while this module is selected as the slave device.
2
C Slave Status Register (I2CS_STAT) - (D0) DA_STOP: Stop Condition Detect Bit
2
... I
C communication process to enter standby state that is ready to detect the next start condition.
... I2CS module sets DA_STOP to 1. At the same time, it initializes the I
2
C Slave Access Status Register (I2CS_ASTAT) - (D1) SELECTED: I
/13 to f
Sampling rate [sps] = ...
*2 The oscillation start time varies ... the crystal resonator used and the C
*2 The oscillation start time varies ... the ceramic resonator used and the C
*1 Ceramic resonator = CSTR4M00G53095-R0: ... (C
[Hz]
IOSC
[kHz]
IOSC
Contents
2
C bus. ...
/20 [sps] (f
: A/D conversion clock frequency)
= 1.8 to 3.6V, V
= 0V, Ta = 25°C ...
SS
= 1.8 to 3.6V, V
= 0V, Ta = 25°C, R
DD
SS
= C
G3
= 1.8 to 3.6V, ...
DD
= 2.5 to 3.6V, ...
DD
ReViSiOn hiSTORY
2
C communication process.
2
C Slave Select Status Bit
= C
= 15pF ...
G3
D3
and C
values.
G3
D3
= 1MW ...
F3
1
and C
values.
G3
D3
= 1MW ...
F3
= 15pF built-in)
D3
reference voltage)
C2
/R
= 100kW
REF
SEN
/R
= 100kW, TCCLK = 8MHz
REF
SEN
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