Epson S1C17624 Technical Manual page 45

Register name address Bit
iRaM Size 0x5326 D15–9 –
Select Register
(16 bits)
D8
(MiSC_iRaMSZ)
D7
D6–4 –
(S1C17622)
D3
D2–0 iRaMSZ[2:0] IRAM size select
iRaM Size 0x5326 D15–9 –
Select Register
(16 bits)
D8
(MiSC_iRaMSZ)
D7
D6–4 –
(S1C17602)
D3
D2–0 iRaMSZ[2:0] IRAM size select
iRaM Size 0x5326 D15–9 –
Select Register (16 bits)
D8
(MiSC_iRaMSZ)
D7
D6–4 –
(S1C17621)
D3
D2–0 iRaMSZ[2:0] IRAM size select
D[2:0] iRaMSZ[2:0]: iRaM Size Select Bits
Selects the internal RAM size used.
iRaMSZ[2:0]
0x3
0x2
0x1
Other
notes: • The MISC_IRAMSZ register is write-protected. The write-protection must be overridden by
writing 0x96 to the MISC_PROT register. Note that the MISC_PROT register should normally
be set to a value other than 0x96, except when writing to the MISC_IRAMSZ register. Unnec-
essary programs may result in system malfunctions.
• In the S1C17602/621, do not alter the IRAMSZ[2:0]/MISC_IRAMSZ register setting from the
default value.
3.4 Display RaM area
The display RAM for the on-chip LCD driver is located in the 56-byte area (S1C17624/622) or 40-byte area
(S1C17604/602/621) beginning with address 0x53c0 in the internal peripheral area. The display RAM is accessed
in one cycle as a 16-bit device. It can be used as a general-purpose RAM when it is not used for display. See the
"Display Memory" section in the "LCD Driver (LCD)" chapter for specific information on the display memory.
3.5 internal Peripheral area
The I/O and control registers for the internal peripheral modules are located in the 1K-byte area beginning with ad-
dress 0x4000 and the 4K-byte area beginning with address 0x5000.
For details of each control register, see the I/O register list in Appendix or description for each peripheral module.
3.5.1 internal Peripheral area 1 (0x4000–)
The internal peripheral area 1 beginning with address 0x4000 contains the I/O memory for the peripheral functions
listed below and this area can be accessed in one cycle.
• MISC register (MISC, 8-bit device)
• UART (UART, 8-bit device)
S1C17624/604/622/602/621 TeChniCal Manual
name Function
reserved
DBaDR
Debug base address select
–
reserved
reserved
–
reserved
reserved
DBaDR
Debug base address select
–
reserved
reserved
–
reserved
reserved
DBaDR Debug base address select
– reserved
reserved
– reserved
Table 3. 3.1.2 Selecting Internal RAM Size
S1C17624/604 S1C17622
2KB
4KB
8KB (default) Reserved (default)
Reserved Reserved
Seiko epson Corporation
Setting
–
1 0x0 0 0xfffc00
–
–
–
IRAMSZ[2:0]
0x3
0x2
Other reserved
–
1 0x0 0 0xfffc00
–
–
–
IRAMSZ[2:0]
0x7–0x0 reserved
–
1 0x0 0 0xfffc00
–
–
–
IRAMSZ[2:0]
0x7–0x0 reserved
internal RaM size
S1C17602
2KB Reserved
4KB Reserved (default) Reserved (default)
Reserved
Reserved
3 MeMORY MaP
init. R/W Remarks
– – 0 when being read.
0 R/W
– – 0 when being read.
– – 0x1 when being read.
– – 0 when being read.
Size 0x1 R/W
2KB
4KB
– – 0 when being read.
0 R/W
– – 0 when being read.
– – 0x2 when being read.
– – 0 when being read.
Size 0x2 R/W
– – 0 when being read.
0 R/W
– – 0 when being read.
– – 0x2 when being read.
– – 0 when being read.
Size 0x2 R/W
S1C17621
Reserved
Reserved
Reserved
3-7