Epson S1C17624 Technical Manual page 345

Cmos 16-bit single chip microcontroller
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Register name address
Bit
MiSC Protect
0x5324
D15–0 PROT[15:0] MISC register write protect
Register
(16 bits)
(MiSC_PROT)
iRaM Size
0x5326
D15–9 –
Select Register
(16 bits)
D8
(MiSC_iRaMSZ)
D7
D6–4 –
(S1C17624/604)
D3
D2–0 iRaMSZ[2:0] IRAM size select
iRaM Size
0x5326
D15–9 –
Select Register
(16 bits)
D8
(MiSC_iRaMSZ)
D7
D6–4 –
(S1C17622)
D3
D2–0 iRaMSZ[2:0] IRAM size select
iRaM Size
0x5326
D15–9 –
Select Register
(16 bits)
D8
(MiSC_iRaMSZ)
D7
D6–4 –
(S1C17602)
D3
D2–0 iRaMSZ[2:0] IRAM size select
iRaM Size
0x5326
D15–9 –
Select Register
(16 bits)
D8
(MiSC_iRaMSZ)
D7
D6–4 –
(S1C17621)
D3
D2–0 iRaMSZ[2:0] IRAM size select
Vector Table
0x5328
D15–8 TTBR[15:8] Vector table base address A[15:8]
address low
(16 bits)
D7–0 TTBR[7:0]
Register
(MiSC_TTBRl)
Vector Table
0x532a
D15–8 –
address high
(16 bits)
D7–0 TTBR[23:16] Vector table base address
Register
(MiSC_TTBRh)
PSR Register
0x532c
D15–8 –
(MiSC_PSR)
(16 bits)
D7–5 PSRil[2:0] PSR interrupt level (IL) bits
D4
D3
D2
D1
D0
S1C17624/604/622/602/621 TeChniCal Manual
name
Function
reserved
DBaDR
Debug base address select
reserved
reserved
reserved
reserved
DBaDR
Debug base address select
reserved
reserved
reserved
reserved
DBaDR
Debug base address select
reserved
reserved
reserved
reserved
DBaDR
Debug base address select
reserved
reserved
reserved
Vector table base address A[7:0]
(fixed at 0)
reserved
A[23:16]
reserved
PSRie
PSR interrupt enable (IE) bit
PSRC
PSR carry (C) flag
PSRV
PSR overflow (V) flag
PSRZ
PSR zero (Z) flag
PSRn
PSR negative (N) flag
Seiko epson Corporation
aPPenDiX a liST OF i/O ReGiSTeRS
Setting
init. R/W
Writing 0x96 removes the write
0x0 R/W
protection of the MISC regis-
ters (0x5326–0x532a).
Writing another value set the
write protection.
1 0x0
0 0xfffc00
IRAMSZ[2:0]
Size
0x1 R/W
0x3
2KB
0x2
4KB
0x1
8KB
Other
reserved
1 0x0
0 0xfffc00
IRAMSZ[2:0]
Size
0x1 R/W
0x3
2KB
0x2
4KB
reserved
Other
1 0x0
0 0xfffc00
IRAMSZ[2:0]
Size
0x2 R/W
0x7–0x0
reserved
1 0x0
0 0xfffc00
IRAMSZ[2:0]
Size
0x2 R/W
0x7–0x0
reserved
0x0–0xff
0x80 R/W
0x0
0x0
0x0–0xff
0x0 R/W
0x0 to 0x7
0x0
1 1 (enable)
0 0 (disable)
1 1 (set)
0 0 (cleared)
1 1 (set)
0 0 (cleared)
1 1 (set)
0 0 (cleared)
1 1 (set)
0 0 (cleared)
Remarks
0 when being read.
0
R/W
0 when being read.
0x1 when being read.
0 when being read.
0 when being read.
0
R/W
0 when being read.
0x1 when being read.
0 when being read.
0 when being read.
0
R/W
0 when being read.
0x2 when being read.
0 when being read.
0 when being read.
0
R/W
0 when being read.
0x2 when being read.
0 when being read.
R
0 when being read.
0 when being read.
R
0
R
0
R
0
R
0
R
0
R
aP-a-23

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