Epson S1C17624 Technical Manual page 271

Cmos 16-bit single chip microcontroller
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24 a/D COnVeRTeR (aDC10)
When ADMS is 0, the A/D converter operates in one-time conversion mode. In this mode, A/D conver-
sion is terminated after all inputs in the range of the channels selected by ADCS[2:0] and ADCE[2:0]
have been converted once.
D[5:4]
aDTS[1:0]: Conversion Trigger Select Bits
Selects a trigger source to start A/D conversion.
When an external trigger is used, the #ADTRG pin must be configured in advance using the port func-
tion select bit (see the "I/O Ports (P)" chapter). A/D conversion is started when a falling edge of the
#ADTRG signal is detected.
When 16-bit timer (T16) Ch.0 is used, since its underflow signal serves as a trigger, set the underflow
cycle and other conditions for the timer.
D3
Reserved
D[2:0]
aDST[2:0]: Sampling Time Setting Bits
Sets the analog input sampling time.
a/D Control/Status Register (aDC10_CTl)
Register name address
Bit
a/D Control/
0x5384
D15
Status Register
(16 bits)
D14–12 aDiCh[2:0] Conversion channel indicator
(aDC10_CTl)
D11
D10
D9
D8
D7–6 –
D5
D4
D3–2 –
D1
D0
D15
Reserved
D[14:12] aDiCh[2:0]: Conversion Channel indicator Bits
Indicates the channel number (0 to 7) currently being A/D-converted. (Default: 0x0 = AIN0)
When A/D conversion is performed in multiple channels, read this bit to identify the channel in which
conversion is underway.
D11
Reserved
24-10
Table 24.
6.3 Trigger Selection
aDTS[1:0]
0x3
0x2
0x1
0x0
Table 24.
6.4 Sampling Time Settings
aDST[2:0]
0x7
0x6
0x5
0x4
0x3
0x2
0x1
0x0
name
Function
reserved
reserved
aDiBS
ADC10 status
aDOWe
Overwrite error flag
aDCF
Conversion completion flag
reserved
aDOie
Overwrite error interrupt enable
aDCie
Conversion completion int. enable 1 Enable
reserved
aDCTl
A/D conversion control
aDen
ADC10 enable
Seiko epson Corporation
Trigger source
External trigger (#ADTRG)
Reserved
16-bit timer Ch.0
Software trigger
(Default: 0x0)
Sampling time
(in a/D conversion clock cycles)
9 cycles
8 cycles
7 cycles
6 cycles
5 cycles
4 cycles
3 cycles
2 cycles
(Default: 0x7)
Setting
0x0 to 0x7
1 Busy
0 Idle
1 Error
0 Normal
1 Completed
0 Run/Stand-
by
1 Enable
0 Disable
0 Disable
1 Start
0 Stop
1 Enable
0 Disable
S1C17624/604/622/602/621 TeChniCal Manual
init. R/W
Remarks
0 when being read.
0x0
R
0 when being read.
0
R
0
R/W Reset by writing 1.
0
R
Reset when ADC10_
ADD is read.
0 when being read.
0
R/W
0
R/W
0 when being read.
0
R/W
0
R/W

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