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11 16-BiT TiMeRS (T16)
One-shot mode
Count clock
PRESER write
PRUN
Counter
Interrupt request
Repeat mode
Count clock
PRESER write
PRUN
Counter
Interrupt request
11.8
T16 Output Signals
The T16 module outputs underflow pulses when the counter underflows.
These pulses are used for timer interrupt requests.
These pulses are also used to generate the serial transfer clock for the internal serial interface or the A/D conversion
trigger signal.
The clock generated is sent to the internal peripheral module, as shown below.
T16 Ch.0 output clock → A/D converter
T16 Ch.1 output clock → SPI
T16 Ch.2 output clock → I
Use the following equations to calculate the reload data register value for obtaining the desired transfer rate or A/D
conversion interval:
SPI
TR = —————— - 1
I
C master
2
TR = —————— - 1
A/D converter
TR = —————— - 1
ct_clk: Count clock frequency (Hz)
TR:
Reload data (0–65535)
bps:
Transfer rate (bits/s)
adi:
A/D conversion interval (s)
11.9
T16 interrupts
Each channel of the T16 module outputs an interrupt request to the interrupt controller (ITC) when the counter un-
derflows.
underflow interrupt
When the counter underflows, the interrupt flag T16IF/T16_INTx register, which is provided for each channel
in the T16 module, is set to 1. At the same time, an interrupt request is sent to the ITC if T16IE/T16_INTx reg-
ister has been set to 1 (interrupt enabled). An interrupt is generated if the ITC and S1C17 Core interrupt condi-
tions are satisfied.
11-6
Set by software
n
n-1
Set by software
n
n-1
Figure 11.
2
C master
ct_clk
bps × 2
ct_clk
bps × 4
ct_clk × adi
2
Seiko epson Corporation
Reset by hardware
1
0
1
0
n
n-1
7.1 Count Operation
S1C17624/604/622/602/621 TeChniCal Manual
n
Reset by software
1
0
n
n-1
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