Epson S1C17624 Technical Manual page 274

Table 24.
note: To use the A/D converter, the clock used in the A/D converter must be supplied by turning on the
peripheral module clock (PCLK) output from the clock generator (CLG).
S1C17624/604/622/602/621 TeChniCal Manual
6.5 A/D Conversion Clock (PCLK Division Ratio) Selection
aDDF[3:0]
0xf
0xe
0xd
0xc
0xb
0xa
0x9
0x8
0x7
0x6
0x5
0x4
0x3
0x2
0x1
0x0
Seiko epson Corporation
24 a/D COnVeRTeR (aDC10)
Division ratio
Reserved
1/32768
1/16384
1/8192
1/4096
1/2048
1/1024
1/512
1/256
1/128
1/64
1/32
1/16
1/8
1/4
1/2
(Default: 0x0)
24-13