Epson S1C17624 Technical Manual page 140

Cmos 16-bit single chip microcontroller
Table of Contents

Advertisement

12.9
Control Register Details
address
0x5300
T16E_CA0
T16E Ch.0 Compare Data A Register
0x5302
T16E_CB0
T16E Ch.0 Compare Data B Register
0x5304
T16E_TC0
T16E Ch.0 Counter Data Register
0x5306
T16E_CTL0
T16E Ch.0 Control Register
0x5308
T16E_DF0
T16E Ch.0 Clock Division Ratio Select Register
0x530a
T16E_IMSK0 T16E Ch.0 Interrupt Mask Register
0x530c
T16E_IFLG0
T16E Ch.0 Interrupt Flag Register
The T16E registers are described in detail below. These are 16-bit registers.
note: When data is written to the registers, the "Reserved" bits must always be written as 0 and not 1.
T16e Ch.x Compare Data a Register (T16e_Cax)
Register name address
Bit
T16e Ch.x
0x5300
D15–0 Ca[15:0]
Compare Data
(16 bits)
a Register
(T16e_Cax)
D[15:0]
Ca[15:0]: Compare Data a
Sets compare data A. (Default: 0x0)
When CBUFEN/T16E_CTLx register is set to 0, this register can be used to directly read from or di-
rectly write to the compare data A register.
When CBUFEN is set to 1, data is read from and written to these registers via the compare data A buf-
fer. The buffer contents are loaded into the compare data A register when the counter is reset.
The data set is compared against the counter data, and a cause of compare A interrupt is generated if
the contents match. The timer output waveform changes at the same time (rises when INVOUT/T16E_
CTLx register = 0 or falls when INVOUT = 1). These processes do not affect the counter data or count
operations.
T16e Ch.x Compare Data B Register (T16e_CBx)
Register name address
Bit
T16e Ch.x
0x5302
D15–0 CB[15:0]
Compare Data
(16 bits)
B Register
(T16e_CBx)
D[15:0]
CB[15:0]: Compare Data B
Sets compare data B. (Default: 0x0)
When CBUFEN/T16E_CTLx register is set to 0, this register can be used to directly read from or di-
rectly write to the compare data B register.
When CBUFEN is set to 1, data is read from and written to these registers via the compare data B buf-
fer. The buffer contents are loaded into the compare data B register when the counter is reset.
The data set is compared against the counter data, and a cause of compare B interrupt is generated if
the contents match. The timer output waveform changes at the same time (falls when INVOUT/T16E_
CTLx register = 0 or rises when INVOUT = 1) and the counter is reset.
T16e Ch.x Counter Data Register (T16e_TCx)
Register name address
Bit
T16e Ch.x
0x5304
D15–0 TC[15:0]
Counter Data
(16 bits)
Register
(T16e_TCx)
D[15:0]
TC[15:0]: Counter Data
Counter data can be read out. (Default: 0x0)
The counter value can also be set by writing data to this register.
S1C17624/604/622/602/621 TeChniCal Manual
Table 12.
9.1 List of T16E Registers
Register name
name
Function
Compare data A
CA15 = MSB
CA0 = LSB
name
Function
Compare data B
CB15 = MSB
CB0 = LSB
name
Function
Counter data
TC15 = MSB
TC0 = LSB
Seiko epson Corporation
12 16-BiT PWM TiMeR (T16e)
Function
Sets compare data A.
Sets compare data B.
Counter data
Sets the timer mode and starts/stops the timer.
Selects the count clock.
Sets the interrupt mask.
Indicates and reset interrupt occurrence status.
Setting
init. R/W
0x0 to 0xffff
0x0 R/W
Setting
init. R/W
0x0 to 0xffff
0x0 R/W
Setting
init. R/W
0x0 to 0xffff
0x0 R/W
Remarks
Remarks
Remarks
12-7

Advertisement

Table of Contents
loading

This manual is also suitable for:

S1c17604S1c17622S1c17602S1c17621

Table of Contents