Epson S1C17624 Technical Manual page 238

Cmos 16-bit single chip microcontroller
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(3) Interrupt handling
When a rising edge or falling edge interrupt occurs, write 0xff to REMLEN[7:0]/REMC_LCNT register in the
interrupt handler routine to set the value to the data length counter.
The data length counter starts counting down using the selected data length counter clock from the value writ-
ten.
The data received can be read out from REMDT/REMC_LCNT register.
The subsequent falling or rising edge interrupt is generated at the termination of the data pulse. Read the data
length counter at that point. The data length can be calculated from the difference between 0xff and the value
read. To receive the subsequent data, set the data length counter to 0xff once again, then wait for the subsequent
interrupt.
If the data length counter becomes 0 after being set to 0xff without the occurrence of an edge interrupt, either
no more data is left or a receive error has occurred. Data length counter underflow interrupts are generated even
when receiving data and should be used for terminate/error handling.
(4) Terminating data reception
To terminate data reception, write 0 to REMEN after the final data has been received.
22.6
ReMC interrupts
The REMC module includes a function for generating the following three different types of interrupts.
• Underflow interrupt
• Rising edge interrupt
• Falling edge interrupt
The REMC module outputs one interrupt signal shared by the three interrupt causes above to the interrupt controller
(ITC). To identify the cause of interrupt occurred, check the interrupt flag status in the REMC module.
underflow interrupt
Generated when the data length counter has counted down to 0, this interrupt cause sets the interrupt flag RE-
MUIF/REMC_INT register inside the REMC to 1.
When data is being transmitted, the underflow interrupt indicates that the specified data length has been trans-
mitted. When receiving data, the underflow interrupt indicates that data has been received or a receive error has
occurred.
To use this interrupt, set REMUIE/REMC_INT register to 1. If REMUIE is set to 0 (default), the interrupt re-
quest attributable to this cause will not be sent to the ITC.
When REMUIF is set to 1, REMC outputs an interrupt request to the ITC. An interrupt will be generated if the
ITC and S1C17 Core interrupt conditions are met.
REMUIF should be inspected in the REMC interrupt handler routine to determine whether the REMC interrupt
is attributable to data length counter underflow.
The interrupt cause should be cleared in the interrupt handler routine by resetting (writing 1 to) REMUIF.
Rising edge interrupt
Generated when the REMI pin input signal changes from Low to High, this interrupt cause sets the interrupt
flag REMRIF/REMC_INT register to 1 within the REMC.
By running the data length counter between this interrupt and a falling edge interrupt when data is being re-
ceived, the received data pulse width can be calculated from that count value.
To use this interrupt, set REMRIE/REMC_INT register to 1. If REMRIE is set to 0 (default), the interrupt re-
quest attributable to this cause will not be sent to the ITC.
When REMRIF is set to 1, REMC outputs an interrupt request to the ITC. An interrupt will be generated if the
ITC and S1C17 Core interrupt conditions are met.
REMRIF should be inspected in the REMC interrupt handler routine to determine whether the REMC interrupt
is attributable to input signal rising edge.
The interrupt cause should be cleared in the interrupt handler routine by resetting (writing 1 to) REMRIF.
S1C17624/604/622/602/621 TeChniCal Manual
Seiko epson Corporation
22 iR ReMOTe COnTROlleR (ReMC)
22-5

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