Epson S1C17624 Technical Manual page 14

1 Overview
The S1C17624/604/622/602/621 is a 16-bit MCU featuring high-speed low-power operations, compact dimensions,
wide address space, and on-chip ICE. Based on an S1C17 CPU core, this product consists of a Flash memory,
RAM, serial interface modules supporting sensors such as UART to support high-bit rate and IrDA1.0, SPI, and
C, various timers, maximum 47 general input/output ports, maximum 52 segment × 8 common LCD driver and a
I
2
power supply voltage booster circuit, A/D converter, R/F converter, supply voltage detector, and 32 kHz and maxi-
mum 8.2 MHz oscillator circuits.
It allows 8.2 MHz high-speed operation at a minimum of 1.8 V operating voltage, and executes a basic instruction
in one clock cycle with 16-bit RISC processing. The S1C17624/604/622/602/621 also includes a coprocessor sup-
porting multiplication, division, and MAC (multiply and accumulation) operations.
The on-chip ICE function allows onboard Flash programming/erasing, program debugging, and evaluations using
the ICDmini (S5U1C17001H) that can be connected with three signal wires.
The S1C17624/604/622/602/621 is ideal for applications, such as health care products with sensors, sports watches,
and meter modules that must be driven with battery power and require sensor interfaces and a high-definition LCD
display.
1.1 Features
The main features of the S1C17624/604/622/602/621 are listed below.
Model
CPu
CPU core
Multiplier/Divider (COPRO)
embedded Flash memory
Capacity
Erase/program count
Other
embedded RaM
Capacity
embedded Display RaM
Capacity
Clock generator
System clock source
IOSC oscillator circuit
OSC3 oscillator circuit
OSC1 oscillator circuit
Other
Real-time clock
RTC module
i/O ports
Number of general-purpose I/O
ports
Serial interfaces
SPI
I 2 C master (I2CM)
I C slave (I2CS)
2
UART
IR remote controller (REMC)
S1C17624/604/622/602/621 TeChniCal Manual
Table 1.
S1C17624 S1C17604
Seiko Epson original 16-bit RISC CPU core S1C17
• 16-bit × 16-bit multiplier
• 16-bit × 16-bit + 32-bit multiply and accumulation unit
• 16-bit ÷ 16-bit divider
128K bytes
(Can be used for both instructions and data.)
1,000 cycles (min.)
• Read/program protection function
• Allows on-board programming using a debugging tool such as ICDmini (S5U1C17001H) and self-
programming by software control.
8K bytes
56 bytes 40 bytes
3 sources (IOSC/OSC3/OSC1)
2.7 MHz(typ.) internal oscillator circuit (oscillation start time 5 µs min.)
8.2 MHz (max.) crystal or ceramic oscillator circuit
Supports an external clock input.
32.768 kHz (typ.) crystal oscillator circuit
• Core clock frequency control
• Peripheral module clock supply control
Included
(Contains second, minute, hour,
day, days of week, month, and year
counters.)
Max. 47 bits Max. 36 bits
(Pins are shared with the peripheral I/O.)
1 channel
1 channel
1 channel
2 channels (IrDA1.0 supported)
1 channel
Seiko epson Corporation
1.1 Features
S1C17622
64K bytes
4K bytes
56 bytes
Max. 47 bits
1 OVeRVieW
S1C17602 S1C17621
32K bytes
2K bytes
40 bytes
Max. 36 bits
1-1