Epson S1C17624 Technical Manual page 300

28 MulTiPlieR/DiViDeR (COPRO)
Setting value
(D[6:4])
16 low-order bits output mode
0x0
The low-order 16 bits of operation results
can be read as the coprocessor output.
16 high-order bits output mode
0x1
The high-order 16 bits of operation results
can be read as the coprocessor output.
0x2–0x7 Reserved
28.3 Multiplication
The multiplication function performs "A (32 bits) = B (16 bits) × C (16 bits)."
To perform a multiplication, set the operation mode to 0x4 (unsigned multiplication) or 0x5 (signed multiplication).
Then send the 16-bit multiplicand (B) and 16-bit multiplier (C) to the multiplier/divider using a "ld.ca" instruc-
tion. The one-half (16 bits according to the output mode) result (A[15:0] or A[31:16]) and the flag status will be
returned to the CPU registers. Another one-half should be read by setting the multiplier/divider into operation result
read mode.
28-2
Table 28. 2.1 Mode Settings
Output mode
Argument 2
Argument 1
S1C17 Core
Coprocessor
output (16 bits)
Flag output
Figure 28. 3.1 Data Path in Multiplication Mode
Seiko epson Corporation
Setting value
(D[3:0])
initialize mode 0
0x0
Clears the operation result register to 0x0.
initialize mode 1
0x1
Loads the 16-bit augend into the low-order
16 bits of the operation result register.
initialize mode 2
0x2
Loads the 32-bit augend into the operation
result register.
Operation result read mode
0x3
Outputs the data in the operation result reg-
ister without computation.
0x4 unsigned multiplication mode
Performs unsigned multiplication.
Signed multiplication mode
0x5
Performs signed multiplication.
0x6 Reserved
Signed MaC mode
0x7
Performs signed MAC operation.
unsigned division mode
0x8
Performs unsigned division.
Signed division mode
0x9
Performs signed division.
0xa–0xf Reserved
16 bits
32 bits
Operation
result
Operation result
register
Selector
S1C17624/604/622/602/621 TeChniCal Manual
Operation mode