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Epson S1C17M24 Manuals
Manuals and User Guides for Epson S1C17M24. We have
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Epson S1C17M24 manual available for free PDF download: Technical Manual
Epson S1C17M24 Technical Manual (319 pages)
CMOS 16-BIT SINGLE CHIP MICROCONTROLLER
Brand:
Epson
| Category:
Microcontrollers
| Size: 7.85 MB
Table of Contents
3
Notational Conventions and Symbols in This Manual
4
Table of Contents
14
1 Overview
14
Features
16
Block Diagram
17
Pins
17
S1C17M20/M23 Pin Configuration Diagram
19
S1C17M21/M24 Pin Configuration Diagram
20
S1C17M22/M25 Pin Configuration Diagram
21
Pin Descriptions
24
2 Power Supply, Reset, and Clocks
24
Power Generator (PWG)
24
Overview
24
Pins
24
Regulator Operation Mode
25
System Reset Controller (SRC)
25
Overview
25
Input Pin
26
Reset Sources
26
Initialization Conditions (Reset Groups)
27
Clock Generator (CLG)
27
Overview
28
Input/Output Pins
28
Clock Sources
31
Operations
35
Operating Mode
35
Initial Boot Sequence
35
Transition Between Operating Modes
37
Interrupts
37
Control Registers
37
PWG V D1 Regulator Control Register
38
CLG System Clock Control Register
39
CLG Oscillation Control Register
40
CLG OSC1 Control Register
41
CLG OSC3 Control Register
42
CLG Interrupt Flag Register
43
CLG Interrupt Enable Register
44
CLG FOUT Control Register
45
3 CPU and Debugger
45
Overview
46
CPU Core
46
CPU Registers
46
Instruction Set
46
Reading PSR
46
I/O Area Reserved for the S1C17 Core
46
Debugger
47
List of Debugger Input/Output Pins
47
External Connection
47
Flash Security Function
48
Control Register
48
MISC PSR Register
48
Debug RAM Base Register
49
4 Memory and Bus
49
Overview
49
Bus Access Cycle
50
Flash Memory
50
Flash Memory Pin
50
Flash Bus Access Cycle Setting
51
Flash Programming
51
Ram
51
Peripheral Circuit Control Registers
56
System-Protect Function
56
Control Registers
56
MISC System Protect Register
56
MISC IRAM Size Register
56
FLASHC Flash Read Cycle Register
58
5 Interrupt Controller (ITC)
58
Overview
58
Vector Table
60
Vector Table Base Address (TTBR)
60
Initialization
60
Maskable Interrupt Control and Operations
60
Peripheral Circuit Interrupt Control
61
ITC Interrupt Request Processing
61
Conditions to Accept Interrupt Requests By the CPU
61
Nmi
61
Software Interrupts
62
Interrupt Processing By the CPU
62
Control Registers
62
MISC Vector Table Address Low Register
62
MISC Vector Table Address High Register
62
ITC Interrupt Level Setup Register X
65
6 O Ports (PPORT)
65
Overview
66
I/O Cell Structure and Functions
67
Schmitt Input
67
Over Voltage Tolerant Fail-Safe Type I/O Cell
67
Pull-Up/Pull-Down
67
CMOS Output and High Impedance State
67
Clock Settings
67
PPORT Operating Clock
68
Clock Supply in SLEEP Mode
68
Clock Supply in DEBUG Mode
68
Operations
68
Initialization
69
Port Input/Output Control
70
Interrupts
71
Control Registers
71
Px Port Data Register
71
Px Port Enable Register
72
Px Port Pull-Up/Down Control Register
72
Px Port Interrupt Flag Register
72
Px Port Interrupt Control Register
73
Px Port Chattering Filter Enable Register
73
Px Port Mode Select Register
73
Px Port Function Select Register
74
P Port Clock Control Register
75
P Port Interrupt Flag Group Register
76
Control Register and Port Function Configuration of This IC
76
P0 Port Group
78
P1 Port Group
81
P2 Port Group
83
P3 Port Group
85
P4 Port Group
87
Pd Port Group
88
Common Registers Between Port Groups
89
7 Universal Port Multiplexer (UPMUX)
89
Overview
89
Peripheral Circuit I/O Function Assignment
90
Control Registers
90
Pxy-Xz Universal Port Multiplexer Setting Register
91
8 Watchdog Timer (WDT2)
91
Overview
91
Clock Settings
91
WDT2 Operating Clock
91
Clock Supply in DEBUG Mode
92
Operations
92
WDT2 Control
93
Operations in HALT and SLEEP Modes
93
Control Registers
93
WDT2 Clock Control Register
94
WDT2 Control Register
94
WDT2 Counter Compare Match Register
96
9 Real-Time Clock (RTCA)
96
Overview
96
Output Pin and External Connection
96
Output Pin
97
Clock Settings
97
RTCA Operating Clock
97
Theoretical Regulation Function
98
Operations
98
RTCA Control
99
Real-Time Clock Counter Operations
99
Stopwatch Control
99
Stopwatch Count-Up Pattern
100
Interrupts
101
Control Registers
101
RTC Control Register
102
RTC Second Alarm Register
103
RTC Hour/Minute Alarm Register
103
RTC Stopwatch Control Register
104
RTC Second/1Hz Register
105
RTC Hour/Minute Register
106
RTC Month/Day Register
106
RTC Year/Week Register
107
RTC Interrupt Flag Register
108
RTC Interrupt Enable Register
110
10 Supply Voltage Detector (SVD3)
110
Overview
111
Input Pins and External Connection
111
Input Pins
111
External Connection
111
Clock Settings
111
SVD3 Operating Clock
111
Clock Supply in SLEEP Mode
112
Clock Supply in DEBUG Mode
112
Operations
112
SVD3 Control
113
SVD3 Operations
113
SVD3 Interrupt and Reset
113
SVD3 Interrupt
114
SVD3 Reset
114
Control Registers
114
SVD3 Clock Control Register
115
SVD3 Control Register
116
SVD3 Status and Interrupt Flag Register
117
SVD3 Interrupt Enable Register
118
11 Bit Timers (T16)
118
Overview
118
Input Pin
119
Clock Settings
119
T16 Operating Clock
119
Clock Supply in SLEEP Mode
119
Clock Supply in DEBUG Mode
119
Event Counter Clock
119
Operations
120
Counter Underflow
120
Operations in Repeat Mode
120
Operations in One-Shot Mode
121
Counter Value Read
121
Interrupt
121
Control Registers
121
T16 Ch.n Clock Control Register
122
T16 Ch.n Mode Register
122
T16 Ch.n Control Register
123
T16 Ch.n Reload Data Register
123
T16 Ch.n Counter Data Register
123
T16 Ch.n Interrupt Flag Register
124
T16 Ch.n Interrupt Enable Register
125
12 Uart (Uart3)
125
Overview
126
Input/Output Pins and External Connections
126
List of Input/Output Pins
126
External Connections
126
Input Pin Pull-Up Function
126
Output Pin Open-Drain Output Function
126
Input/Output Signal Inverting Function
127
Clock Supply in SLEEP Mode
127
Clock Supply in DEBUG Mode
127
Baud Rate Generator
127
Data Format
128
Operations
128
Initialization
129
Data Transmission
130
Data Reception
131
Irda Interface
131
Carrier Modulation
132
Framing Error
132
Parity Error
132
Receive Errors
133
Overrun Error
133
Interrupts
133
Control Registers
133
UART3 Ch.n Clock Control Register
134
UART3 Ch.n Mode Register
135
UART3 Ch.n Baud-Rate Register
136
UART3 Ch.n Control Register
136
UART3 Ch.n Transmit Data Register
136
UART3 Ch.n Receive Data Register
137
UART3 Ch.n Status and Interrupt Flag Register
138
UART3 Ch.n Interrupt Enable Register
138
UART3 Ch.n Carrier Waveform Register
139
13 Synchronous Serial Interface (SPIA)
139
Overview
140
Input/Output Pins and External Connections
140
List of Input/Output Pins
140
External Connections
141
Pin Functions in Master Mode and Slave Mode
141
Input Pin Pull-Up/Pull-Down Function
141
Clock Settings
141
SPIA Operating Clock
142
Clock Supply in DEBUG Mode
142
SPI Clock (Spiclkn) Phase and Polarity
143
Data Format
143
Operations
143
Initialization
143
Data Transmission in Master Mode
145
Data Reception in Master Mode
146
Terminating Data Transfer in Master Mode
146
Data Transfer in Slave Mode
148
Terminating Data Transfer in Slave Mode
148
Interrupts
149
Control Registers
149
SPIA Ch.n Mode Register
150
SPIA Ch.n Control Register
151
SPIA Ch.n Transmit Data Register
151
SPIA Ch.n Receive Data Register
151
SPIA Ch.n Interrupt Flag Register
152
SPIA Ch.n Interrupt Enable Register
153
14 C (I2C)
153
Overview
154
Input/Output Pins and External Connections
154
List of Input/Output Pins
154
External Connections
155
Clock Settings
155
I2C Operating Clock
155
Clock Supply in DEBUG Mode
155
Baud Rate Generator
156
Operations
156
Initialization
157
Data Transmission in Master Mode
159
Data Reception in Master Mode
161
10-Bit Addressing in Master Mode
162
Data Transmission in Slave Mode
164
Data Reception in Slave Mode
166
Slave Operations in 10-Bit Address Mode
166
Automatic Bus Clearing Operation
167
Error Detection
168
Interrupts
169
Control Registers
169
I2C Ch.n Clock Control Register
170
I2C Ch.n Mode Register
170
I2C Ch.n Baud-Rate Register
170
I2C Ch.n Own Address Register
171
I2C Ch.n Control Register
172
I2C Ch.n Transmit Data Register
172
I2C Ch.n Receive Data Register
172
I2C Ch.n Status and Interrupt Flag Register
173
I2C Ch.n Interrupt Enable Register
175
15 Bit PWM Timers (T16B)
175
Overview
176
Input/Output Pins
177
Clock Settings
177
T16B Operating Clock
177
Clock Supply in SLEEP Mode
177
Clock Supply in DEBUG Mode
177
Event Counter Clock
178
Operations
178
Initialization
179
Counter Block Operations
182
Comparator/Capture Block Operations
190
TOUT Output Control
196
Control Registers
196
T16B Ch.n Clock Control Register
197
T16B Ch.n Counter Control Register
198
T16B Ch.n Max Counter Data Register
198
T16B Ch.n Timer Counter Data Register
199
T16B Ch.n Counter Status Register
200
T16B Ch.n Interrupt Flag Register
201
T16B Ch.n Interrupt Enable Register
202
T16B Ch.n Comparator/Capture M Control Register
204
T16B Ch.n Compare/Capture M Data Register
205
16 Sound Generator (SNDA)
205
Overview
206
Output Pins and External Connections
206
List of Output Pins
206
Output Pin Drive Mode
206
External Connections
207
Clock Settings
207
SNDA Operating Clock
207
Clock Supply in SLEEP Mode
207
Clock Supply in DEBUG Mode
207
Operations
207
Initialization
210
Buzzer Output in One-Shot Buzzer Mode
211
Output in Melody Mode
213
Interrupts
213
Control Registers
213
SNDA Clock Control Register
214
SNDA Select Register
215
SNDA Control Register
215
SNDA Data Register
216
SNDA Interrupt Flag Register
217
SNDA Interrupt Enable Register
218
17 IR Remote Controller (REMC3)
218
Overview
218
Input/Output Pins and External Connections
218
Output Pin
219
External Connections
219
Clock Settings
219
REMC3 Operating Clock
219
Clock Supply in SLEEP Mode
219
Clock Supply in DEBUG Mode
219
Operations
220
Data Transmission Procedures
220
REMO Output Waveform
222
Continuous Data Transmission and Compare Buffers
223
Interrupts
224
Application Example: Driving EL Lamp
224
Control Registers
224
REMC3 Clock Control Register
225
REMC3 Data Bit Counter Control Register
226
REMC3 Data Bit Counter Register
227
REMC3 Data Bit Active Pulse Length Register
227
REMC3 Data Bit Length Register
227
REMC3 Status and Interrupt Flag Register
228
REMC3 Interrupt Enable Register
228
REMC3 Carrier Waveform Register
229
REMC3 Carrier Modulation Control Register
230
18 F Converter (RFC)
230
Overview
231
Input/Output Pins and External Connections
231
List of Input/Output Pins
231
External Connections
232
Clock Settings
232
RFC Operating Clock
232
Clock Supply in SLEEP Mode
232
Clock Supply in DEBUG Mode
232
Operations
232
Initialization
233
Operating Modes
233
RFC Counters
234
Converting Operations and Control Procedure
236
CR Oscillation Frequency Monitoring Function
236
Interrupts
237
Control Registers
237
RFC Ch.n Clock Control Register
237
RFC Ch.n Control Register
238
RFC Ch.n Oscillation Trigger Register
239
RFC Ch.n Measurement Counter Low and High Registers
239
RFC Ch.n Time Base Counter Low and High Registers
240
RFC Ch.n Interrupt Flag Register
240
RFC Ch.n Interrupt Enable Register
241
19 Bit A/D Converter (ADC12A)
241
Overview
242
Input Pins and External Connections
242
List of Input Pins
242
External Connections
242
Clock Settings
242
ADC12A Operating Clock
242
Sampling Time
243
Operations
243
Initialization
243
Conversion Start Trigger Source
244
Conversion Mode and Analog Input Pin Settings
244
A/D Conversion Operations and Control Procedures
246
Interrupts
246
Control Registers
246
ADC12A Ch.n Control Register
247
ADC12A Ch.n Trigger/Analog Input Select Register
248
ADC12A Ch.n Configuration Register
249
ADC12A Ch.n Interrupt Flag Register
250
ADC12A Ch.n Interrupt Enable Register
250
ADC12A Ch.n Result Register M
251
20 Multiplier/Divider (COPRO2)
251
Overview
251
Operation Mode and Output Mode
252
Multiplication
253
Division
255
Mac
257
Reading Operation Results
258
21 Electrical Characteristics
258
Absolute Maximum Ratings
258
Recommended Operating Conditions
259
Current Consumption
261
System Reset Controller (SRC) Characteristics
261
Clock Generator (CLG) Characteristics
264
Flash Memory Characteristics
264
Input/Output Port (PPORT) Characteristics
267
UART (UART3) Characteristics
267
Synchronous Serial Interface (SPIA) Characteristics
268
I 2 C (I2C) Characteristics
269
R/F Converter (RFC) Characteristics
270
12-Bit A/D Converter (ADC12A) Characteristics
272
22 Basic External Connection Diagram
274
23 Package
277
Appendix A List of Peripheral Circuit Control Registers
277
Power Generator (PWG)
293
0X4300-0X431E Universal Port Multiplexer (UPMUX)
295
UART (UART3) Ch.0
297
0X43C0-0X43D2
299
0X5040-0X505A 16-Bit PWM Timer (T16B) Ch.1
310
Appendix B Power Saving
310
Operating Status Configuration Examples for Power Saving
311
Other Power Saving Methods
312
Appendix C Mounting Precautions
315
Appendix D Measures against Noise
316
Appendix E Initialization Routine
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