Epson S1C17624 Technical Manual page 42

Cmos 16-bit single chip microcontroller
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3 MeMORY MaP
3.2
Flash area
3.2.1
embedded Flash Memory
The S1C17624/604 contains a 128K-byte Flash memory (4K bytes × 32 sectors), the S1C17622/602 contains a
64K-byte Flash memory (4K bytes × 16 sectors), and the S1C17621 contains a 32K-byte Flash memory (4K bytes
× 8 sectors) for storing application programs and data.
Flash memory capacity
Address range
Address 0x8000 is defined as the vector table base address, therefore a vector table (see "Vector Table" in the "In-
terrupt Controller (ITC)" chapter) must be placed from the beginning of the Flash memory. The vector table base
address can be modified with the MISC_TTBRL/MISC_TTBRH registers.
The Flash memory can be read in 1 to 5 cycles.
3.2.2
Flash Programming
The S1C17624/604/622/602/621 supports on-board programming of the Flash memory, it makes it possible
to program the Flash memory with the application programs/data by using the debugger through an ICDmini
(S5U1C17001H). Furthermore, the S1C17624/604/622/602/621 supports self-programming by the application pro-
gram. The Flash memory can be programmed in 16-bit units. The Flash memory supports two erase methods, chip
erase and sector erase.For the Flash programming using the debugger, see the "S5U1C17001C Manual" included
in the S1C17 Family C Compiler Package. For the self-programming controlled by the user program, see the "Self-
Programming (FLS) Application Notes" for the S1C17624/604/622/602/621.
note: The debugger supports chip erase only and does not allow erasing in sector units.
3.2.3
Protect Bits
In order to protect the memory contents, the Flash memory provides two protection features, write protection and
data read protection, that can be configured for every 16K-byte areas. The write protection disables writing data to
the configured area. The data-read protection disables reading data from the configured area (the read value is al-
ways 0x0000). However, it does not disable the instruction fetch operation by the CPU.
The Flash memory provides the protect bits listed below. Program the protect bit corresponding to the area to be
protected to 0.
Flash Protect Bits (S1C17624/604)
address
Bit
0x27ffc
D15–8 reserved
(16 bits)
D7
Flash write-protect bit for 0x24000–0x27fff
D6
Flash write-protect bit for 0x20000–0x23fff
D5
Flash write-protect bit for 0x1c000–0x1ffff
D4
Flash write-protect bit for 0x18000–0x1bfff
D3
Flash write-protect bit for 0x14000–0x17fff
D2
Flash write-protect bit for 0x10000–0x13fff
D1
Flash write-protect bit for 0xc000–0xffff
D0
Flash write-protect bit for 0x8000–0xbfff
address
Bit
0x27ffe
D15–8 reserved
(16 bits)
D7
Flash data-read-protect bit for 0x24000–0x27fff
D6
Flash data-read-protect bit for 0x20000–0x23fff
D5
Flash data-read-protect bit for 0x1c000–0x1ffff
D4
Flash data-read-protect bit for 0x18000–0x1bfff
D3
Flash data-read-protect bit for 0x14000–0x17fff
D2
Flash data-read-protect bit for 0x10000–0x13fff
D1
Flash data-read-protect bit for 0xc000–0xffff
D0
reserved
3-4
Table 3.
2.1.1 Embedded Flash Memory
S1C17624/604
128K bytes
0x8000 to 0x27fff
Function
1 Writable
1 Writable
1 Writable
1 Writable
1 Writable
1 Writable
1 Writable
1 Writable
Function
1 Readable
1 Readable
1 Readable
1 Readable
1 Readable
1 Readable
1 Readable
Seiko epson Corporation
S1C17622/602
64K bytes
0x8000 to 0x17fff
0x8000 to 0xffff
Setting
init. R/W
0 Protected
1
R/W
0 Protected
1
R/W
0 Protected
1
R/W
0 Protected
1
R/W
0 Protected
1
R/W
0 Protected
1
R/W
0 Protected
1
R/W
0 Protected
1
R/W
Setting
init. R/W
0 Protected
1
R/W
0 Protected
1
R/W
0 Protected
1
R/W
0 Protected
1
R/W
0 Protected
1
R/W
0 Protected
1
R/W
0 Protected
1
R/W
1
1
R/W Always set to 1.
S1C17624/604/622/602/621 TeChniCal Manual
S1C17621
32K bytes
Remarks
Remarks

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