Epson S1C17624 Technical Manual page 295

Setting PRUND to 1 enables the peripheral circuits that operate with PCLK to run even in debug mode.
Setting it to 0 will stop them when the S1C17 Core enters debug mode. Set PRUND to 1 to maintain
running status for these peripheral circuits in debug mode.
D0 PRun: Prescaler Run/Stop Control Bit
Runs/stops the prescaler.
1 (R/W): Run
0 (R/W): Stop (default)
Write 1 to PRUN to run the prescaler for the peripheral circuit shown below and write 0 to stop the pr-
escaler.
• 16-bit timer (T16)
• Fine mode 8-bit timer (T8F)
• 16-bit PWM timer (T16E)
• IR remote controller (REMC)
• I/O port (P)
• UART
• SPI
• I 2 C master (I2CM)
• A/D converter (ADC10)
OSC1 Peripheral Control Register (MiSC_OSC1)
Register name address Bit
OSC1 Peripheral 0x5322 D15–1 –
Control Register
(16 bits)
D0
(MiSC_OSC1)
D[15:1] Reserved
D0 O1DBG: Run/Stop Select Bit in Debug Mode (except PClK peripheral circuits)
Selects the operating status of the peripheral circuits that operate with a clock other than PCLK in debug
mode.
1 (R/W): Run
0 (R/W): Stop (default)
Setting O1DBG to 1 enables the peripheral circuits that operate with a clock other than PCLK to run
even in debug mode. Setting it to 0 will stop them when the S1C17 Core enters debug mode. Set O1DBG
to 1 to maintain running status for these peripheral circuits in debug mode.
Some peripheral circuits, such as SPI, I2CS, and T16A2, that run with an external input clock will not
stop operating even if the S1C17 Core enters debug mode.
The LCD driver continues the operating status at occurrence of the debug interrupt.
iRaM Size Select Register (MiSC_iRaMSZ)
Register name address Bit
iRaM Size 0x5326 D15–9 –
Select Register
(16 bits)
D8
(MiSC_iRaMSZ)
D7
D6–4 –
(S1C17624/604)
D3
D2–0 iRaMSZ[2:0] IRAM size select
S1C17624/604/622/602/621 TeChniCal Manual
name Function
reserved
O1DBG
Run/stop select in debug mode
(except PCLK peripheral circuits)
name Function
reserved
DBaDR
Debug base address select
– reserved
reserved
–
reserved
Seiko epson Corporation
27 On-ChiP DeBuGGeR (DBG)
Setting init. R/W
–
1 Run 0 Stop
Setting init. R/W
–
1 0x0 0 0xfffc00
–
–
–
IRAMSZ[2:0] Size 0x1 R/W
0x3 2KB
0x2 4KB
0x1 8KB
Other reserved
Remarks
– – 0 when being read.
0 R/W
Remarks
– – 0 when being read.
0 R/W
– – 0 when being read.
– – 0x1 when being read.
– – 0 when being read.
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