Configuration Capabilities - Agilent Technologies 1660A Series User Reference

50/100-mhz state, 500-mhz timing logic analyzers
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Configuration Capabilities

The five analyzer models in the 1660 Series offer a wide variety of channel
widths and memory depth combinations. The number of data channels range
from 34 channels with the 1664A, up to 136 channels with the 1660A. In
addition, a half channel acquisition mode is available which doubles memory
depth from 4 Kbytes to 8 Kbytes per channel while reducing channel width
by half.
The configuration guide below illustrates the memory depth/channel width
combinations in all acquisition modes with all analyzer models.
State Analyzer Configurations
1660A
8K-deep / 68
Half channel
chan. 65 data
50/100 MHz
3 data or clock
4K-deep / 136
Full channel
chan. 130 data
50/100 MHz
6 data or clock
State Analyzer Configuration Considerations
Unused clock channels can be used as data channels.
With Time or State tags turned on, memory depth is reduced by half.
However, full depth is retained if you leave one pod pair unassigned.
Maximum of 6 clocks in the 1660A model.
1661A
8K-deep / 51
chan. 48 data
+
+
3 data or clock
4K-deep / 102
chan. 96 data
+
+
6 data or clock
Configuration Capabilities
1662A
1663A
8K-deep / 34
8K-deep / 17
chan. 32 data
chan. 16 data
+
+
2 data or clock
1 data or clock
4K-deep / 68
4K-deep / 34
chan. 64 data
chan. 32 data
+
+
4 data or clock
2 data or clock
Introduction
1664A
8K-deep / 17
chan. 16 data
+
1 data or clock
4K-deep / 34
chan. 32 data
+
2 data or clock
1–5

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