Agilent Technologies 16712A Help Manual
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Agilent Technologies 16712A Help Manual

Agilent Technologies 16712A Help Manual

128k sample logic analyzer
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Agilent Technologies 16712A Help Manual

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  • Page 1 Artisan Technology Group is your source for quality new and certified-used/pre-owned equipment SERVICE CENTER REPAIRS WE BUY USED EQUIPMENT • FAST SHIPPING AND DELIVERY Experienced engineers and technicians on staff Sell your excess, underutilized, and idle used equipment at our full-service, in-house repair center We also offer credit for buy-backs and trade-ins •...
  • Page 2 Help Volume © 1992-2002 Agilent Technologies. All rights reserved. Agilent Technologies 16712A 128K Sample Logic Analyzer Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 3: Table Of Contents

    Agilent Technologies 16712A 128K Sample Logic Analyzer The Agilent Technologies 16712A logic analyzer offers a full set of data capture features and 128 K samples of memory. Special features of this model of logic analyzer include context store and transitional timing acquisition mode.
  • Page 4 “The Trigger Tab” on page 73 “The Symbols Tab” on page 119 “Specifications and Characteristics” on page 103 Main System Help (see the Agilent Technologies 16700A/B-Series Logic Analysis System help volume) Glossary of Terms (see page 131) Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
  • Page 5 Agilent Technologies 16712A 128K Sample Logic Analyzer Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
  • Page 6 Contents Agilent Technologies 16712A 128K Sample Logic Analyzer 1 Agilent Technologies 16712A 128K Sample Logic Analyzer Setting Up a Measurement 10 Connect the Analyzer to the Target System 10 Define the Type of Measurement 11 Set Up the Bus Labels 13...
  • Page 7 Contents The Sampling Tab 41 Acquisition Depth 41 Setting the Acquisition Mode 42 Performing Clock Setup (State only) 42 Naming the Analyzer 45 Turning the Analyzer Off 46 Sample Period (Timing Only) 46 Trigger Position Control 51 The Format Tab 53 Importing Netlist and ASCII Files 54 Exporting ASCII Files 56 Importing ASCII Files 56...
  • Page 8 What is a Specification 103 What is a Characteristic 103 What is a Calibration Procedure 104 What is a Function Test 104 Agilent Technologies 16712A Logic Analyzer Specifications 104 Agilent Technologies 16712A Logic Analyzer Characteristics 105 Analyzer Probing Overview 107 Using Symbols 110...
  • Page 9 Contents The Symbols Tab 119 Symbols Selector Dialog 121 Symbol File Formats 123 General-Purpose ASCII (GPA) Symbol File Format 124 Glossary Index Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 10: Agilent Technologies 16712A 128K Sample Logic Analyzer

    Agilent Technologies 16712A 128K Sample Logic Analyzer Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 11: Setting Up A Measurement

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Setting Up a Measurement Setting Up a Measurement After you have connected the logic analyzer probes to your target system, (see page 10) there are five basic steps for any measurement.

  • Page 12: Define The Type Of Measurement

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Setting Up a Measurement ground each pod. Analysis probes, available for most common microprocessors, can simplify the connection process. The logic analyzer pods carry the signals to the logic analyzer from your target system.
  • Page 13 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Setting Up a Measurement Choose State or Timing In a state measurement, the analyzer uses an external clock to determine when to sample. Each time the analyzer receives a state clock pulse, it samples and stores the logic state of the target system.

  • Page 14: Set Up The Bus Labels

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Setting Up a Measurement See Also “The Sampling Tab” on page 41 for information on setting type and assigning pods “Setting the Acquisition Mode” on page 42 for links to this analyzer's modes “Performing Clock Setup (State only)”...

  • Page 15: Define Trigger Conditions

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Setting Up a Measurement Defined threshold voltage. The logic analyzer requires a minimum voltage swing of 500 mV at the probe tip to recognize changes in logic levels. Step 3: Define Trigger Conditions (see page 14) See Also “Assigning Bits to a Label”...

  • Page 16: Run The Measurement

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Setting Up a Measurement Define Terms Trigger terms are like variables that you use in the trigger sequence. Depending on what analyzer you are using, you can either assign the values directly from within the trigger sequence or from the tabs (pattern, range, edge).

  • Page 17: Examine The Data

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Setting Up a Measurement Select Single or Repetitive Runs can be single or repetitive. Single runs gather data until the logic analyzer memory is full, and then stop. Repetitive runs keep repeating the same measurement and are useful for gathering statistics.
  • Page 18 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Setting Up a Measurement • Search for patterns • Display time-correlated data • Use markers to make measurements and gather statistics Search for Patterns You can search displays for certain values, and place markers on them.

  • Page 19: Making A Basic State Measurement

    The training board has terminations and headers already built in to the system, so you can connect the logic analyzer pod directly to the board. 2. Define the type of measurement On the Agilent Technologies 16700A/B logic analysis system, open a logic analyzer setup window.
  • Page 20 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Making a Basic State Measurement 1. Select the Label1 button. 2. Choose Insert after..3. In the Enter Label Name box, select the OK button. c. Optional - Rename Label1. 1. Select the Label1 button.
  • Page 21 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Making a Basic State Measurement The logic analyzer automatically triggers on Pattern1, the first trigger event. You can set up more complex triggers by editing the sequence levels and combining trigger events.

  • Page 22: Volume

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Making a Basic State Measurement For Details on the Training Board or More Tutorials Making Basic Measurements Examples of Typical Timing Measurements The "Looking at State Events" group under Hardware Turn-On (see the Measurement Examples help volume) measurements.

  • Page 23: Making A Basic Timing Measurement

    The training board has terminations and headers already built in to the system, so you can connect the logic analyzer pod directly to the board. 2. Define the type of measurement. On the Agilent Technologies 16700A/B logic analysis system, open a logic analyzer setup window.
  • Page 24 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Making a Basic Timing Measurement 2. Choose Rename..3. Enter a new name in the name field. 4. Select the OK button to close the Rename Label box. d. Select the bit assignment button.
  • Page 25 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Making a Basic Timing Measurement 1. Select the label name button. 2. To define the event as a combination of labels, choose Insert... To use a different label to define the event, choose Replace... Edges...

  • Page 26: Volume

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Making a Basic Timing Measurement b. Select Analyzer<A> in the menu and choose Waveform<1>. Depending on what other instruments are active, there may be more than one Analyzer<A>. Choose the one that refers to your analyzer.

  • Page 27: Interpreting The Data

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Interpreting the Data Interpreting the Data After you've acquired a trace with the logic analyzer, you can analyze it in the display tools. The logic analysis system also provides filtering and compare tools for more complex analysis.
  • Page 28 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Interpreting the Data 1. Find the edge. a. Select the Search tab. b. Select the down arrow after the Label field, and select the label containing the edge. c. Select the Value field and enter 1.

  • Page 29: Analysis Using Listing

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Interpreting the Data help volume) Using the Listing Display Tool (see the Listing Display Tool help volume) Using the Chart Display Tool (see the Chart Display Tool help volume) Using the Distribution Display Tool (see the Distribution Display Tool...
  • Page 30 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Interpreting the Data 2. Place a marker on the start of the subroutine. Select the Set G1 button. This sets global marker G1 at the address you just found. 3. Find the end of the subroutine.
  • Page 31 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Interpreting the Data help volume) Using the Compare Analysis Tool (see the Compare Tool help volume) Using the Pattern Filter Analysis Tool (see the Pattern Filter Tool help volume) Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 32: Coordinating Measurements

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Coordinating Measurements Coordinating Measurements When you want to coordinate the triggering of two measurements happening on the same logic analyzer, you need to use arming control. The two measurement machines are by default controlled by the same run button.
  • Page 33 Loading and Saving Logic Analyzer Configurations The Agilent Technologies 16712A logic analyzer settings and data can be saved to a configuration file. You can also save any tools connected to the logic analyzer. Later, you can restore your data and settings by loading the configuration file into the logic analyzer.

  • Page 34: When Something Goes Wrong

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer When Something Goes Wrong When Something Goes Wrong • “Nothing Happens” on page 39 • “Error Messages” on page 33 • “Suspicious Data” on page 39 • “Interference with Target System” on page 33...

  • Page 35: Slow Or Missing Clock

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer When Something Goes Wrong “Correlation Invalid, Module Did Not Trigger” on page 38 “Correlation Invalid, Timer Overflowed” on page 38 “Measurement Error: Check Probe Parametrics or Grounding” on page 38 “Clock Lines Must Be Connected to the Card in Slot X” on page 37 Maximum of 32 Channels Per Label The logic analyzer can only assign up to 32 channels for each label.
  • Page 36 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer When Something Goes Wrong Check that the system is running properly. The logic analyzer and other probing fixtures such as pin extenders can place too much capacitive load on a system.

  • Page 37: Timer Is Off In Sequence Level Where It Is Used

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer When Something Goes Wrong Timer is Off in Sequence Level Where It Is Used Timer controls are available in all sequence levels except the first. You do not need to turn on the timer in the same sequence level, but it does need to be on when it is used in the trigger specification.

  • Page 38: Waiting For Trigger

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer When Something Goes Wrong You can either assign another pod pair to the machine with both timers, or change your trigger specification to use only one timer term. See Also “Using Timer Terms” on page 96...
  • Page 39 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer When Something Goes Wrong Possible Causes • Using a clock channel from an expander card Reconnect the logic analyzer probes to use a clock channel from the master card of the module.

  • Page 40: Nothing Happens

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer When Something Goes Wrong Nothing Happens Look for an error message in the message bar at the top of the window. Common messages are "slow or missing clock" and "Waiting for trigger".

  • Page 41: Testing The Logic Analyzer Hardware

    8. In the Self Test dialog box, select Test All. You can also run individual tests by selecting them. Tests that require you to do something must be run this way. If any test fails, contact your local Agilent Technologies Sales Office or Service Center for assistance. See Also...

  • Page 42: The Sampling Tab

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Sampling Tab The Sampling Tab The options under Sampling tell the analyzer the overall way in which you want to make a measurement. The options include: • The acquisition mode.

  • Page 43: Setting The Acquisition Mode

    The Agilent Technologies 16712A logic analyzer can be split into two analyzers, but only one of them may be a timing analyzer.
  • Page 44 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Sampling Tab Mode field The Mode field lets you select among Master only, Master/slave, and Demultiplex. The default is Master only. When you select the others, another control to set the slave clock appears at the bottom of the Clock Setup area.
  • Page 45 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Sampling Tab Master Data on all pods assigned to Master Clk is strobed into memory when the status of the clock lines match the clocking arrangement specified for Master in the clock setup.

  • Page 46: Naming The Analyzer

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Sampling Tab along with the master data. If multiple slave clocks occur between master clocks, only the data latched by the last slave clock prior to the master clock is strobed into analyzer memory.

  • Page 47: Turning The Analyzer Off

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Sampling Tab Turning the Analyzer Off The On and Off checkboxes under the Sampling tab are a shortcut for activating and de-activating the analyzer. Analyzers come up in the On state. If you select the checkbox, the label changes to Off and the Analyzer Shutdown Options dialog appears.
  • Page 48 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Sampling Tab State Acquisition Modes 100 MHz / 128K State All pods are available. Memory depth is 128 K samples per channel. If time or state count is turned on in Trigger Settings, the total memory is split between data acquisition storage and time or state count storage.
  • Page 49 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Sampling Tab Data is collected on a pod pair basis, even when labels cross pod boundaries. It is still displayed on a label basis, however. Because of this, some pod pairs with less active channels may take longer to fill memory and the end of the acquisition is delayed.
  • Page 50 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Sampling Tab illustrated below with time-tags 2, 5, 7, and 14. When transitions happen at this rate, two cycles are stored for every transition. Maximum Transitions Stored If transitions occur at a fast rate, such that there is a transition at each sample point, only one sample is stored for each transition as shown by time tags 17 through 21 below.
  • Page 51 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Sampling Tab help to move fast lines from pod 1 to pod 2; they must be moved to pod 3, which is a different pod pair. Invalid Data The analyzer only looks for transitions on bits that are assigned. If the bit is assigned after a run by changing the label and selecting Apply in the analyzer window, another run is automatically started.

  • Page 52: Trigger Position Control

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Sampling Tab Trigger Position Control The Trigger Position control, located under Sampling and also Trigger Settings, determines how much data is stored before and after the trigger occurs for all subsequent acquisitions. The trigger point is placed at a specified position relative to the data in memory.
  • Page 53 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Sampling Tab When the trigger position is set to User Defined, a trigger position slider appears. Use this slider to set the trigger position any where between 0% and 100%. As the slider is adjusted, the % Post Store indicator shows the amount of data that will be stored after the trigger point.

  • Page 54: The Format Tab

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Format Tab The Format Tab Under Format, you specify the parts of the target system that you want the logic analyzer to look at. You set up labels to match the buses of the target system, and set the threshold level for the signals.

  • Page 55: Importing Netlist And Ascii Files

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Importing Netlist and ASCII Files Importing Netlist and ASCII Files Netlist Files The Netlist Import feature provides a method for importing busses and signals from ASCII netlists created by EDA tools. In order for the...
  • Page 56 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Importing Netlist and ASCII Files For Example Label1;A2[15:5];A1[5,2] Bus Name Label1 Pod Numbers A2 and A1 [15:5] Channel 15 through Channel 5 ("***********..") [5,2] Channel 5 and Channel 2 ("..*..*..") When setting up the ASCII file a comma (",") separates individual channels, while a colon (":") creates a range of channels.

  • Page 57: Exporting Ascii Files

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Importing Netlist and ASCII Files Pod A2 Channel 5, and Pod A1 Channel 6. Clocks Label1;CK[AK] Label1 maps to Slot A Clock K. “Importing ASCII Files” on page 56 “Exporting ASCII Files” on page 56 See Also “Termination Adapter”...
  • Page 58 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Importing Netlist and ASCII Files To Import an ASCII 1. Create an ASCII file for importing into the logic analysis system. For file. example: Lab2;A2[15:10,6,3] NewLabel2;A2[15] Label1;A1[15:0] 2. Select the Format tab.

  • Page 59: Termination Adapter

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Importing Netlist and ASCII Files Termination Adapter The logic analyzer cable must have the proper RC network at its input in order acquire data correctly. The Termination Adapter incorporates the RC network into a convenient package. It also reduces the number of pins required for the header on the target board from 40 pins to 20.

  • Page 60: E5346A High Density Adapter

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Importing Netlist and ASCII Files E5346A High Density Adapter The E5346A high-density adapter provides a convenient and easy way to connect an Agilent logic analyzer to the signals on your target system for packages that are difficult to probe.

  • Page 61: Mapping Connector Names

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Importing Netlist and ASCII Files Mapping Connector Names 1. Select the Format tab. 2. Select File, then select Import Netlist. 3. Select Next to go to the Mapping Connector Names dialog.

  • Page 62: Verify Net To Label Mapping

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Importing Netlist and ASCII Files 2. Select the file from the File Selection dialog box. 3. Select OK 4. Select Next Verify Net to Label Mapping 1. Verify that each net was properly imported into a label.

  • Page 63: Select/Create Interface Labels

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Importing Netlist and ASCII Files Select/Create Interface Labels Select any additional labels to be copied into the Format tab. Typically there is no need to add any more labels. However, this screen is useful when you want to designate a signal bit in a bus as a separate label name.

  • Page 64: Assigning Pods To The Analyzers

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Importing Netlist and ASCII Files channel. An active channel looks like A dash at the top of the activity indicator display indicates that the signal connected to that channel is electrically high (above the threshold voltage).

  • Page 65: Data On Clocks Display

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Importing Netlist and ASCII Files Pods can only be assigned on a per-pair basis to either of the two analyzers. Each pod pair has two clock channels, but only the clock channels of pods on the master card can be used in the analyzer's clocking setup.

  • Page 66: Inserting And Deleting Labels

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Importing Netlist and ASCII Files To Assign Bits 1. Select the bit assignment label to the right of the label name you want to define. Each bit assignment label corresponds to the data pod which is listed above it.

  • Page 67: Turning Labels On And Off

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Importing Netlist and ASCII Files instead. Turning Labels On and Off You may want to turn off labels that you have created so that the label is not displayed. When a label is turned off, its name and bit assignments are preserved.

  • Page 68: To Reorder Bits In A Label

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Importing Netlist and ASCII Files • waveforms and bus values (where shown) invert in the Waveform Display tool • "1" and "0" values flip in the Listing Display tool Changing the label polarity does not change these things: •...

  • Page 69: Labels: Mapping Analyzer Channels To Your Target

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Importing Netlist and ASCII Files NOTE: Labels with reordered bits cannot be used as range terms or <, <=,>, >= in triggers. Labels: Mapping Analyzer Channels to Your Target Labels group and identify related channels, such as buses, in a way that is relevant to your system under test.

  • Page 70: Pod Selection

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Importing Netlist and ASCII Files to Master/Slave or Demultiplex. The Pod Clock field is located just below the Pod Threshold in Format. The Pod Clock field is set to Master Clk by default. Use the Pod Clock field to indicate if the pod's data is to be strobed into memory by the master clock, slave clock, or both, in the demultiplex mode.

  • Page 71: Setting The Pod Threshold

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Importing Netlist and ASCII Files “Performing Clock Setup (State only)” on page 42 Setting the Pod Threshold The pod threshold is a voltage level which the data must cross before the analyzer recognizes it as a change in logic levels. You can specify a threshold level for each pod.

  • Page 72: State Clock Setup/Hold (State Only)

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Importing Netlist and ASCII Files User Defined When User Defined is selected, the threshold level is selectable from - 6.0 volts to +6.0 volts. NOTE: The logic analyzer requires a minimum voltage swing of 500 mV at the probe tip to recognize changes in logic levels.
  • Page 73 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Importing Netlist and ASCII Files Default Setup and Hold If the relationship of the clock signal and valid data is such that the data is valid for 1 ns before the clock occurs and 3 ns after the clock occurs, you will want to use the 1.0 setup and 2.5 hold setting.

  • Page 74: The Trigger Tab

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Trigger Tab The Trigger Tab The Trigger tab is used to set up a sequence that tells the analyzer when to capture data. The key event is the trigger. The Trigger tab has two main areas: On top, tabs of functions and controls to build your trigger;...

  • Page 75: Understanding Logic Analyzer Triggering

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Trigger Tab Understanding Logic Analyzer Triggering What is a Trigger (see page 74) What does "Trigger Position" Mean (see page 74) What can be Used to Specify a Trigger (see page 75)
  • Page 76 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Trigger Tab approximately as many samples before the trigger as after. You can also arrange for the trigger to be at the beginning of the "conveyor belt" (acquisition memory), the end, or any percentage along it.

  • Page 77: Setting Up A Trigger

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Trigger Tab all branches, and the first branch that matches is taken. See “Setting Up Loops and Jumps in the Trigger Sequence” on page 79 for more on branching. To look for a sequence of events (for example, first look for a memory reference on ADDR, then a certain value on DATA, and when IRQ goes low, trigger) use different sequence levels.

  • Page 78: Inserting And Deleting Sequence Steps

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Trigger Tab functions match choose User level at the end of the list. For a picture corresponding to the trigger function, select the function from the list. The area to the right shows a picture of the function's effect.

  • Page 79: Editing Sequence Steps

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Trigger Tab • Replace Replaces the currently selected level with the currently highlighted trigger function. • Delete Deletes the level that is currently selected. • Insert Before / Insert After Inserts an additional step before or after the selected step.

  • Page 80: Setting Up Loops And Jumps In The Trigger Sequence

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Trigger Tab Only) “Using Occurrence Counters” on page 91 (State Only) “Using Timer Terms” on page 96 “Setting Up Loops and Jumps in the Trigger Sequence” on page 79 Setting Up Loops and Jumps in the Trigger Sequence To set up loops and jumps in your trigger sequence, use Branches.

  • Page 81: Saving And Recalling Trigger Sequences

    (full channel vs. half channel). The Agilent Technologies 16712A logic analyzer can hold up to 10 trigger sequence specifications per mode per machine, for a total of 40 specifications. When you exit your Agilent Technologies 16700A/B session, the trigger sequences are cleared.

  • Page 82: Clearing Part Or All Of The Trigger

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Trigger Tab If one of the settings in the recalled trigger sequence conflicts with the acquisition mode, it will be set to the closest setting for that mode. Clearing Part or All of the Trigger To Clear Part or All of the Trigger: 1.

  • Page 83: Trigger Functions

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Trigger Tab flow chart, with each step in the sequence being an opportunity to direct the analyzer's selection. You can edit the overall trigger sequence by inserting or deleting sequence steps (see page 77).
  • Page 84 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Trigger Tab State Trigger “Basic State Trigger Functions” on page 86 Functions “Sequence-Dependent Trigger Functions” on page 86 “Time Violations” on page 87 “State User-level” on page 85 See Also “Setting Up a Trigger”...
  • Page 85 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Trigger Tab • Find nth occurrence of an edge. This function becomes true when it finds the designated occurrence of an edge you have designated. Note that the 500-MHz trigger sequencer may not count edges that occur closer than 2 ns.
  • Page 86 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Trigger Tab • Find pattern occurring too late after edge. This function becomes true when one edge you have selected occurs, and for a designated period after that first edge is seen, a pattern is not seen. It uses two internal sequence levels.
  • Page 87 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Trigger Tab trigger function uses one internal sequence level. See Also “Working with the User-level Function” on page 89 for more information on the user-defined mode. Basic State Trigger Functions The following basic trigger functions are found in Trigger Functions when the analyzer is in state mode.
  • Page 88 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Trigger Tab • Find too few states between pattern1 and pattern2. This function becomes true when a designated pattern1 is seen, followed by a designated pattern2, and with fewer than a selected number of states occurring between the two patterns.
  • Page 89 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Trigger Tab This function becomes true when a designated pattern1 is seen, followed by a designated pattern2, and with less than a selected period occurring between the two patterns. It uses two internal sequence levels.

  • Page 90: Working With The User-Level Function

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Trigger Tab structure. Note that when the functions are restored, all changes are lost and any branching that is part of the original structure is restored. See Also “Working with the User-level Function” on page 89 for information on working with functions that are broken down.
  • Page 91 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Trigger Tab To Set Up a User-Defined Macro 1. In the Trigger Functions tab, select User-level at the end of the list. 2. Select the Replace or Insert button. 3. Select the new sequence level number button; choose Edit.
  • Page 92 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Trigger Tab • “Setting Up Loops and Jumps in the Trigger Sequence” on page 79 • “Using Timer Terms” on page 96 Setting Pattern Durations and Occurrence Counts (Timing Only) When a bit pattern is found during a trigger sequence, you can influence when the term actually becomes "true"...

  • Page 93: Defining Resource Terms

    The terms available include patterns, edges, ranges, and timers. When the Agilent Technologies 16712A is configured as a state analyzer, up to fourteen resource terms are available: 10 pattern terms Pattern1 - Pattern9 and Patt10, two range terms, and two timer terms.
  • Page 94 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Trigger Tab edge terms. When the module is set up as two analyzers, each resource term can be used by either of the two analyzers, but not both at the same time.
  • Page 95 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Trigger Tab used in a negated form. To Define a Pattern Term 1. Select the label name button to the right of the term name and choose the label that you want to use.
  • Page 96 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Trigger Tab 5. Enter the pattern for the upper value of the range. Depending on the base setting, such as Hex or Octal, some characters will not be accepted. Right-click on either of the value fields to quickly assign the value to a preset value.
  • Page 97 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Trigger Tab 3. Set the edge or glitch for each channel. Don't cares are indicated by a (.). NOTE: After you close the edge term assignment dialog, you may see $ indicators in the term value field.
  • Page 98 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Trigger Tab Timer control is not available in the first sequence level. 3. Select the Off option button at the bottom of the edit dialog box and choose Start. If the other analyzer is already using a timer, it won't appear in this analyzer's edit dialog.
  • Page 99 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Trigger Tab Not selects the logical negation of the term. 5. Select the logical operator buttons and choose a logic operation. Not all operations are available at all levels of the combination tree.

  • Page 100: Tagging Data With Time Or State Tags (State Only)

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Trigger Tab Tagging Data with Time or State Tags (State Only) The Count field under Settings in Trigger accesses a selection menu which is used to stamp the data at each memory location with either a Time tag or a State Count tag.
  • Page 101 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Trigger Tab Selecting the Arming Control... button brings up the Machine Arming Tree dialog. In this dialog you can set what starts each analyzer, and which one sends a signal to Arm Out. Arm Out is used to send signals to other instruments in the frame, or sent to Port Out.

  • Page 102: Context Store Measurements (State Only)

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Trigger Tab Context Store Measurements (State Only) In a measurement that uses context store, the analyzer captures the events you specify in the trigger sequence, and places the events in the center of a context record.
  • Page 103 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Trigger Tab write, places it in the approximate center of the next available record, and surrounds it with the states that preceded it and the states that followed it. After the measurement is complete, you view a list of writes to the variable and see the routines that executed those writes.

  • Page 104: Specifications And Characteristics

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Specifications and Characteristics Specifications and Characteristics NOTE: Definition of Terms To understand the difference between specifications (see page 103) and characteristics (see page 103), and what gets a calibration procedure (see page 104) and what gets a function test (see page 104), refer to appropriate links within this note.

  • Page 105: What Is A Calibration Procedure

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Specifications and Characteristics What is a Calibration Procedure Calibration procedures verify that products or systems operate within the specifications. Parameters covered by specifications have a corresponding calibration procedure. Calibration procedures include both performance tests and system verification procedure.

  • Page 106: Agilent Technologies 16712A Logic Analyzer Characteristics

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Specifications and Characteristics Minimum Master-to-Master Clock Time:* 10.0 ns Setup/Hold Time:* Single Clock, Single Edge: 0.0/4.0 ns through 4.0/0.0 ns, adjustable in 500-ps increments Single Clock, Multiple Edge: 0.0/4.5 ns through 4.5/0.0 ns,...
  • Page 107 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Specifications and Characteristics - Channel-to-Channel Skew: 2 ns, typical for 1-card module 2.5 ns, typical for 2-card module Triggering - Sequencer Speed: 125 MHz, maximum - State Sequence Levels: - Timing Sequence Levels:...

  • Page 108: Analyzer Probing Overview

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Analyzer Probing Overview Analyzer Probing Overview The figures below shows a variety of simple probing connections. The specific probe type, number of probes, and location on the target circuit depends on your particular measurement.
  • Page 109 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Analyzer Probing Overview Adapter-to-Board Connection Both the 01650-63203 and the E5346A adapters include termination for the logic analyzer. The 01650-63203 termination adapter plugs into a 2 x 10 pin header with 0.1 inch spacing. The E5346A high-density adapter connects to an AMP "Mictor 38"...
  • Page 110 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Analyzer Probing Overview analysis probes consist of a circuit board that attaches to the microprocessor (possibly through an adapter) and a configuration file. The configuration file sets up the logic analyzer's clocks and labels correctly, and may include an inverse assembler.

  • Page 111: Using Symbols

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Using Symbols Using Symbols You can use symbol names in place of data values when: • Setting up triggers • Displaying captured data • Searching for patterns in Listing displays • Setting up pattern filters •...

  • Page 112: To Load Object File Symbols

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Using Symbols To load object file symbols Object files are created by your compiler/linker or other software development tools. 1. Generate an object file with symbolic information using your software development tools.

  • Page 113: To Adjust Symbol Values For Relocated Code

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Using Symbols the object file symbols are reloaded. To delete object file symbol files 1. Select the Symbol tab, and then the Object File tab. 2. Select the file name you want to delete in the text box labeled, Object Files with Symbols Loaded For Label.

  • Page 114: To Create User-Defined Symbols

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Using Symbols whose symbols you wish to relocate. 3. Select the Relocate Sections... button. 4. Enter the desired offset in the Offset all sections by field. The offset is applied from the linked address or segment.

  • Page 115: To Enter Symbolic Label Values

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Using Symbols To delete user-defined symbols 1. Under the Symbol tab, select the User Defined tab. 2. Select the label you want to delete symbols from. 3. Select the symbol to delete.

  • Page 116: To Create An Ascii Symbol File

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Using Symbols by name. You can use the Recall button to recall a desired Search Pattern. • Use the Find Symbols of Type selections to filter the symbols by type. 4. Select the symbol you want to use from the list of Matching Symbols.

  • Page 117: To Create A Readers.ini File

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Using Symbols To create a readers.ini file You can change how an ELF/Stabs, Ticoff or Coff/Stabs symbol file is processed by creating a reader.ini file. 1. Create the reader.ini file on your workstation or PC.
  • Page 118 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Using Symbols section will be read completely. This can occur if the file was created without a "generate debugger information" flag (usually -g). Using the - g will create a Dwarf or Stabs debug section in addition to the ELF section.
  • Page 119 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer Using Symbols MaxSymbolWidth=60 StabsType=2 Example for Coff/Stabs (using Ticoff reader) [ReadersTicoff] MaxSymbolWidth=60 StabsType=2 Example for Ticoff [ReadersTicoff] MaxSymbolWidth=60 ReadOnlyTicoffPage=4 AppendTicoffPage=1 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 120: The Symbols Tab

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Symbols Tab The Symbols Tab The Symbols tab lets you load symbol files or define your own symbols. Symbols are names for particular data values on a label. Two kinds of symbols are available: •...
  • Page 121 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Symbols Tab Object file versions During the load process, a symbol database file with a .ns extension will be created by the system. One .ns database file will be created for each symbol file you load.

  • Page 122: Symbols Selector Dialog

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Symbols Tab Symbols Selector Dialog Search Pattern: Lets you enter partial symbol names and the asterisk wildcard character (*) to limit the symbols to choose from (see “Search Pattern” on page 122). Use the Recall button to select from previous search patterns.
  • Page 123 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Symbols Tab Offset By Lets you add an offset value to the starting point of a symbol. This can be useful when compensating for microprocessor prefetches (see “Offset By Option” on page 122).

  • Page 124: Symbol File Formats

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Symbols Tab func1 and func2 are adjacent to each other in physical memory, with func2 following func1. In order to trigger on func2 without getting a false trigger from a prefetch beyond the end of func1, you need to add an offset value to your label value.

  • Page 125: General-Purpose Ascii (Gpa) Symbol File Format

    Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Symbols Tab C++ notation. To improve performance for these ELF symbol files, type information is not associated with variables. Hence, some variables (typically a few local static variables) may not have the proper size associated with them.
  • Page 126 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Symbols Tab The address or address range must be a hexadecimal number. It must appear on the same line as the symbol name, and it must be separated from the symbol name by one or more blank spaces or tabs. Address ranges must be in the following format: beginning address..ending address...
  • Page 127 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Symbols Tab [START ADDRESS] address #comment text Lines without a preceding header are assumed to be symbol definitions in one of the [VARIABLES] formats. Example This is an example GPA file that contains several different kinds of records.
  • Page 128 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Symbols Tab NOTE: If you use section definitions in a GPA symbol file, any subsequent function or variable definitions must be within the address ranges of one of the defined sections.
  • Page 129 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Symbols Tab VARIABLES You can specify symbols for variables using: • The address of the variable. • The address and the size of the variable. • The range of addresses occupied by the variable.
  • Page 130 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Symbols Tab Example [SOURCE LINES] File: main.c 00001000 00001002 0000100A 0000101E See Also Using the Source Viewer (see the Listing Display Tool help volume) START ADDRESS Format [START ADDRESS] address address The address of the program entry point, in hexadecimal.
  • Page 131 Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer The Symbols Tab Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 132: Glossary

    This refers to a single two machines, refers to the machine instrument intended for use in the that is on by default. The default Agilent Technologies 16700A/B- name is Analyzer<N>, where N is series mainframes. One card fills one the slot letter.
  • Page 133 Glossary pointing device, to click an item, divided into 1K 64-state records. position the cursor over the item. Then quickly press and release the count The count function records periods of time or numbers of state left mouse button. transactions between states stored in clock channel A logic analyzer memory.
  • Page 134 Glossary instrument tool. Multiple data sets device under test The system can be displayed together when under test, which contains the sourced into a single display tool. The circuitry you are probing. Also known Filter tool is used to pass on partial as a target system.
  • Page 135 Glossary Using the Touchscreen: emulation probe The stand-alone Position your finger over the item, equivalent of an emulation module. then press and hold finger to the Most of the tasks which can be screen. While holding the finger performed using an emulation down, slide the finger along the module can also be performed using screen dragging the item to a new...
  • Page 136 (labels) and what logic threshold your signals use. immediate mode In an oscilloscope, the trigger mode that frame The Agilent Technologies or does not require a specific trigger 16700A/B-series logic analysis system condition such as an edge or a mainframe.
  • Page 137 For example, logic analysis system The Agilent a 5-card Agilent Technologies 16555D Technologies 16700A/B-series would be referred to as Slot C: Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
  • Page 138 Glossary machine because the master card is monitor When using the Emulation in slot C of the mainframe. The other Control Interface, running the cards of the module are called monitor means the processor is in debug mode (that is, executing the expansion cards.
  • Page 139 Agilent Technologies 16517A. The Remote displays must be identified to primary branch has an optional the network through an address occurrence count field that can be location.
  • Page 140 Glossary measurement as part of its data measurements. acquisition cycle. state measurement In a state Sampling Use the selections under measurement, the logic analyzer is the logic analyzer Sampling tab to tell clocked by a signal from the system the logic analyzer how you want to under test.
  • Page 141 Glossary symbols Symbols represent target system The system under patterns and ranges of values found test, which contains the on labeled sets of bits. Two kinds of microprocessor you are probing. symbols are available: terms Terms are variables that can •...
  • Page 142 Glossary timing measurement In a timing trace See acquisition. measurement, the logic analyzer samples data at regular intervals trigger sequence A trigger according to a clock signal internal to sequence is a sequence of events that the timing analyzer. Since the you specify.
  • Page 143 Glossary field. This action allows you to select specific portions of a particular waveform in acquisition memory that will be displayed on the screen. You can view any portion of the waveform record in acquisition memory. Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
  • Page 144 16710A specifications clock bits as data channels 16711A characteristics ASCII symbol file clock channel specifiers 16711A specifications clock channels, inputs available as 16712A 128K sample Logic data Analyzer clock edges, adjusting bad data in measurement 16712A characteristics clock lines informational message...
  • Page 145 Index conventional timing acquisition ELF symbol reader options flowchart mode ELF/DWARF file format format tab, use conventional timing acquisition ELF/stabs file format full channel 125MHz transitional modes else branch timing mode count state end trigger position full channel 250MHz timing mode count states timing function enviromental characteristics count time...
  • Page 146 Index maximum transitions stored, full occurrence counter, state trigger channel label polarity, changing measurement doesntrun' occurrence counter, timing trigger label values, symbolic measurement error, check probe labels occurs field labels, activating measurement setup occurs trigger field labels, add after measurement, probing options odd-numbered addresses labels, add before measurements, overview of basic...
  • Page 147 Index power through pod cables, sampling tab, use state modes characteristic sampling tab, uses state modes, characteristic predefined macros saving trigger sequences state speed, characteristic predefined trigger functions, Search Pattern field state tags modifying searching the symbol database state trigger functions prefetch, triggering beyond sections store context measurements...
  • Page 148 Index time tag resolution, characteristic trigger glitch trigger, pause timer trigger inhibited informational trigger, poststore time tags message trigger, resetting time violation functions trigger macros, selecting trigger, setting up timer error message trigger pattern functions trigger, start timer timer warning message trigger pattern terms trigger, stop timer timer, characteristics...
  • Page 149 Index wildcard characters writes to a variable, storing Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
  • Page 150 Publication Number: 5988-9030EN January 1, 2003 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
  • Page 151 Artisan Technology Group is your source for quality new and certified-used/pre-owned equipment SERVICE CENTER REPAIRS WE BUY USED EQUIPMENT • FAST SHIPPING AND DELIVERY Experienced engineers and technicians on staff Sell your excess, underutilized, and idle used equipment at our full-service, in-house repair center We also offer credit for buy-backs and trade-ins •...

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