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Page 2 Help Volume © 1992-2002 Agilent Technologies. All rights reserved. Agilent Technologies 16718A Logic Analyzer Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 3: Table Of Contents
Agilent Technologies 16718A Logic Analyzer The Agilent Technologies 16718A 333 MHz State/2 GHz Timing Zoom logic analyzer offers 8M deep memory and very fast sample rates - up to 2 GHz for areas around the trigger - with up to 340 channels.
Page 4 191 • “Understanding State Mode Sampling Positions” on page 208 See Also Main System Help (see the Agilent Technologies 16700A/B-Series Logic Analysis System help volume) Glossary (see page 211) Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 5 Agilent Technologies 16718A Logic Analyzer Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 6 Contents Agilent Technologies 16718A Logic Analyzer 1 Getting Started Step 1. Connect the logic analyzer to the device under test 13 Step 2. Choose the sampling mode 14 Step 3. Format labels for the probed signals 17 Step 4. Define the trigger condition 20 Step 5.
Page 7 Contents Formatting Labels for Logic Analyzer Probes 53 To assign pods to one or two analyzers 53 To set pod threshold voltages 54 To assign probe channels to labels 55 To change the label polarity 57 To reorder bits in a label 57 To turn labels off or on 58 Setting Up Triggers and Running Measurements 60 Using Trigger Functions 61...
Page 8 Contents Using Symbols 95 To load object file symbols 96 To adjust symbol values for relocated code 97 To create user-defined symbols 98 To enter symbolic label values 99 To create an ASCII symbol file 100 To create a readers.ini file 101 Printing/Exporting Captured Data 104 Cross-Triggering 106 To cross-trigger between two analyzers 106...
Page 9 Contents Importing Netlist and ASCII Files 121 Exporting ASCII Files 123 Importing ASCII Files 123 Termination Adapter 125 E5346A High Density Adapter 126 Mapping Connector Names 127 Import the Net List File 127 Verify Net to Label Mapping 128 Select/Create Interface Labels 129 Pod Assignment Dialog 130 Sampling Positions Dialog 131 The Trigger Tab 146...
Page 10 Waiting for Trigger 184 Analyzer armed from another module contains no "Arm in from IMB" event 185 Specifications and Characteristics 186 Agilent 16718A Logic Analyzer Specifications 186 Agilent 16718A Logic Analyzer Characteristics 186 What is a Specification? 189 What is a Characteristic? 190...
Page 11 Contents 4 Concepts Understanding Logic Analyzer Triggering 192 The Conveyor Belt Analogy 192 Summary of Triggering Capabilities 194 Sequence Levels 194 Boolean Expressions 197 Branches 198 Edges 198 Ranges 198 Flags 199 Occurrence Counters and Global Counters 199 Timers 200 Storage Qualification 201 Strategies for Setting Up Triggers 203 Conclusions 207...
Page 12: Getting Started
Getting Started After you have connected the logic analyzer probes to your device under test (see “Step 1. Connect the logic analyzer to the device under test” on page 13), any measurement will have the following basic steps: Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 13 Chapter 1: Getting Started • “Step 2. Choose the sampling mode” on page 14 • “Step 3. Format labels for the probed signals” on page 17 • “Step 4. Define the trigger condition” on page 20 • “Step 5. Run the measurement” on page 21 •...
Page 14: Step 1. Connect The Logic Analyzer To The Device Under Test
Chapter 1: Getting Started Step 1. Connect the logic analyzer to the device under test Step 1. Connect the logic analyzer to the device under test Before you begin setting up the logic analyzer for a measurement, you need to physically connect the logic analyzer to your device under test. There are several ways to connect logic analyzer probes to the device under test: •...
Page 15: Step 2. Choose The Sampling Mode
Chapter 1: Getting Started Step 2. Choose the sampling mode Step 2. Choose the sampling mode There are two logic analyzer sampling modes to choose from: timing mode and state mode. In timing mode, the logic analyzer samples asynchronously, based on an internal sampling clock signal.
Page 16 Chapter 1: Getting Started Step 2. Choose the sampling mode If you chose Timing Mode 1. Select the timing analyzer full/half channel configuration. Typically, you can choose a half-channel configuration with faster sampling and greater memory depth, but with half of the channels. 2.
Page 17 Chapter 1: Getting Started Step 2. Choose the sampling mode You can also specify clock input signal levels (from the device under test) that will enable (qualify) the sampling clock. In either sampling mode 1. Specify the trigger position. The trigger is the event in the device under test that you want to capture data around.
Page 18: Step 3. Format Labels For The Probed Signals
Chapter 1: Getting Started Step 3. Format labels for the probed signals Step 3. Format labels for the probed signals When a logic analyzer probes hundreds of signals in a device under test, you need to be able to give those channels more meaningful names than "pod 1, channel 1".
Page 19 Chapter 1: Getting Started Step 3. Format labels for the probed signals To assign pods to one or two logic analyzers A logic analyzer's pod pairs can be assigned to one or two separate logic analyzers or they can be left unassigned. 1.
Page 20 Chapter 1: Getting Started Step 3. Format labels for the probed signals To assign names to logic analyzer channels 1. Select a label button, and either: • Choose the Rename command, enter the label name, and select the OK button. •...
Page 21: Step 4. Define The Trigger Condition
Chapter 1: Getting Started Step 4. Define the trigger condition Step 4. Define the trigger condition The trigger is the event in the device under test that you want to capture data around. 1. In the Trigger tab, and in the Trigger Functions subtab, choose the type of trigger you want to specify, and select the Replace button.
Page 22: Step 5. Run The Measurement
Chapter 1: Getting Started Step 5. Run the measurement Step 5. Run the measurement Once the trigger condition has been defined, you can run the measurement. 1. Select the Run Single button When you run a measurement, the Stop button becomes available while the logic analyzer looks for the trigger condition.
Page 23: Step 6. Display The Captured Data
Chapter 1: Getting Started Step 6. Display the captured data Step 6. Display the captured data Once you have run a measurement and filled the logic analyzer's acquisition memory with captured data, you can display it with one of the display tools. To open Waveform or Listing displays Waveform displays are typically used when data is captured with the timing sampling mode, and Listing displays are used when data is...
Page 24 Chapter 1: Getting Started Step 6. Display the captured data 3. Drag the display tool icon and drop it on the analyzer icon. 4. To open the display tool, select its icon and choose the Display command. Next: “For More Information...” on page 24 Artisan Technology Group - Quality Instrumentation ...
Page 25: For More Information
Chapter 1: Getting Started For More Information... For More Information... On making • “Example: Timing measurement on counter board” on page 26 measurements on the • “Example: State measurement on counter board” on page 28 demo counter board: • Making Basic Measurements for a self-paced tutorial On connecting the •...
Page 26 Chapter 1: Getting Started For More Information... help volume) • Using the Compare Analysis Tool (see the Compare Tool help volume) Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 27: Example: Timing Measurement On Counter Board
Making Basic Measurements kit as the device under test. The kit is supplied with every logic analysis system, or can be ordered from your Agilent Technologies Sales Office. To connect the logic analyzer to the device under test 1. Connect Pod 1 of the logic analyzer to J1 on the demo counter board.
Page 28 Chapter 1: Getting Started Example: Timing measurement on counter board To run the measurement 1. Select the Run Single button. To display the captured data 1. From the Window menu, select your logic analyzer and choose the Waveform command. See Also “For More Information...”...
Page 29: Example: State Measurement On Counter Board
Making Basic Measurements kit as the device under test. The kit is supplied with every logic analysis system, or can be ordered from your Agilent Technologies Sales Office. To connect the logic analyzer to the device under test 1. Connect Pod 1 of the logic analyzer to J1 on the demo counter board.
Page 30 Chapter 1: Getting Started Example: State measurement on counter board To run the measurement 1. Select the Run Single button. To display the captured data 1. From the Window menu, select your logic analyzer and choose the Listing command. See Also “For More Information...”...
Page 31 Chapter 1: Getting Started Example: State measurement on counter board Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 32: Task Guide
Task Guide • “Probing the Device Under Test” on page 33 • “Choosing the Sampling Mode” on page 36 • “Selecting the Timing Mode (Asynchronous Sampling)” on page 36 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 33 Chapter 2: Task Guide • “Selecting the State Mode (Synchronous Sampling)” on page 39 • “In Either Timing Mode or State Mode” on page 48 • “Using 2 GHz Timing Zoom” on page 50 • “Formatting Labels for Logic Analyzer Probes” on page 53 •...
Page 34: Probing The Device Under Test
The standard lead set plugs directly into any .1-inch grid with 0.026 to 0.033-inch diameter round pins or 0.025-inch square pins. All probe tips work with the Agilent Technologies 5059-4356 surface mount grabbers and the Agilent Technologies 5959-0288 through-hole grabbers.
Page 35 ©3M 2520-series, or similar alternative connector. Suggested termination is shown in the Logic Analysis System and Measurement Modules Installation Guide. Also use this termination with the Agilent Technologies E5351A high- density, non-terminated adapter. Pod-to-Analysis Analysis probes (formerly called preprocessors) are microprocessor- Probe Connection specific interfaces that make it easier to probe buses.
Page 36 Chapter 2: Task Guide Probing the Device Under Test correctly, and may include an inverse assembler. The circuit board provides access to logical groups of pins through headers designed to connect directly to the logic analyzer. The easiest way to set up a measurement with an analysis probe is the Setup Assistant (see the Setup Assistant help volume).
Page 37: Choosing The Sampling Mode
Chapter 2: Task Guide Choosing the Sampling Mode Choosing the Sampling Mode There are two logic analyzer sampling modes to choose from: timing mode and state mode. In timing mode, the logic analyzer samples asynchronously, based on an internal sampling clock signal. In state mode, the logic analyzer samples synchronously, based on a sampling clock signal (or signals) from the device under test.
Page 38 Chapter 2: Task Guide Choosing the Sampling Mode 3. Choose the Timing Mode option. You can also select the timing sampling mode in the “Pod Assignment Dialog” on page 130. To select the full/half channel configuration 1. In the Sampling tab, with Timing Mode selected, select the timing analyzer configuration.
Page 39 Chapter 2: Task Guide Choosing the Sampling Mode NOTE: When the Sample Period is 1.5 ns, data is acquired at four times the trigger sequencer rate. This, along with other half-channel mode characteristics, means that data must be present for at least five samples before the trigger sequencer can reliably detect it.
Page 40: Selecting The State Mode (Synchronous Sampling)
Chapter 2: Task Guide Choosing the Sampling Mode Selecting the State Mode (Synchronous Sampling) In state mode, the logic analyzer samples synchronously, based on a sampling clock signal (or signals) from the device under test. Typically, the signal used for sampling in state mode is a state machine or microprocessor clock signal.
Page 41 Chapter 2: Task Guide Choosing the Sampling Mode To select the state mode 1. Open the logic analyzer Setup window. 2. Select the Sampling tab. 3. Choose the State Mode option. You can also select the state sampling mode in the “Pod Assignment Dialog”...
Page 42 Chapter 2: Task Guide Choosing the Sampling Mode saved into one sample of logic analyzer memory. Two additional sampling clock modes let you capture data differently: • In the Master/Slave mode, you can save data captured on different clock edges into the same sample of logic analyzer memory. When the slave clock occurs, data captured on the pods that use the slave clock is saved in a slave latch.
Page 43 Chapter 2: Task Guide Choosing the Sampling Mode To set up the master/slave sampling clock mode 1. In the Sampling tab, with State Mode selected, select the Master/Slave mode in the Clock Setup area. 2. In the Format tab, select Slave Clock for each pod that should use the slave clock, and select Master Clk for each pod that should use the master clock.
Page 44 Chapter 2: Task Guide Choosing the Sampling Mode See Also “To change the sampling clock mode” on page 40 To automatically adjust sampling positions When adjusting the state mode sampling position with eye finder, the logic analyzer looks at signals from the device under test, figures out the location of the data valid window in relation to the sampling clock, and automatically sets the sampling position.
Page 45 Chapter 2: Task Guide Choosing the Sampling Mode The Use demo data (no probes required) option is for demonstration purposes only. 8. Choose the labels that you wish to run eye finder on. You may want to run eye finder on channel subsets, for example, when certain bus signals transition in one operating mode (of the device under test) and other bus signals transition in a different operating mode.
Page 46 Chapter 2: Task Guide Choosing the Sampling Mode To view eye finder data as a bus composite When you want a compressed, high-level view of the eye finder data: 1. In the Eye Finder Results tab, select the label button and choose the View as Bus Composite command.
Page 47 Chapter 2: Task Guide Choosing the Sampling Mode 2. In the file browser dialog, name the file to be saved or select the file to be loaded. For more information on save/load messages, see “Eye Finder Load/Save Messages” on page 141. See Also “Understanding State Mode Sampling Positions”...
Page 48 Chapter 2: Task Guide Choosing the Sampling Mode setup time is the front edge of the setup/hold window relative to the sampling clock, and the hold time is the back edge of the setup/hold window relative to the sampling clock. 1.
Page 49: In Either Timing Mode Or State Mode
Chapter 2: Task Guide Choosing the Sampling Mode (The actual sampling position is in the middle of the setup/hold window.) See Also “Understanding State Mode Sampling Positions” on page 208 “To automatically adjust sampling positions” on page 43 In Either Timing Mode or State Mode •...
Page 50 Chapter 2: Task Guide Choosing the Sampling Mode not look for a trigger until the specified percentage of pretrigger data has been stored. After a trigger has been detected, the specified percentage of posttrigger data is stored before the analyzer halts. In State and Transitional Store Qualified modes, when a Run is started, the analyzer immediately looks for the trigger condition.
Page 51: Using 2 Ghz Timing Zoom
Chapter 2: Task Guide Choosing the Sampling Mode 2. In the Analyzer Shutdown Options dialog, choose either: • Soft -- This will leave the logic analyzer window but turn off most options. • Hard -- This will remove the logic analyzer and its display tools from the Workspace.
Page 52 Chapter 2: Task Guide Choosing the Sampling Mode 1. In the Sampling tab, select the Timing Zoom button. 2. In the Timing Zoom controls dialog, select the On/Off checkbox. To set the Timing Zoom trigger position 1. In the Sampling tab, select the Timing Zoom button. 2.
Page 53 Chapter 2: Task Guide Choosing the Sampling Mode To specify which analyzer has Timing Zoom NOTE: If you have both analyzers of the module turned on, you need to specify which analyzer you want to use Timing Zoom with. 1. In the Sampling tab, select the Timing Zoom button. 2.
Page 54: Formatting Labels For Logic Analyzer Probes
Chapter 2: Task Guide Formatting Labels for Logic Analyzer Probes Formatting Labels for Logic Analyzer Probes The Format tab is mainly for assigning bus and signal names (from the device under test) to logic analyzer channels. These names are called labels.
Page 55: To Set Pod Threshold Voltages
Chapter 2: Task Guide Formatting Labels for Logic Analyzer Probes When using a multi-card logic analyzer: • When both analyzers are turned on, pods 1/2 and 3/4 of the master card cannot be assigned to the same analyzer. • Each pod pair has two clock channels, but only the clock channels of pods on the master card can be used in the analyzer's clocking setup.
Page 56: To Assign Probe Channels To Labels
Chapter 2: Task Guide Formatting Labels for Logic Analyzer Probes • LVCMOS 1.5v -- The threshold level is +0.75 volts. • LVCMOS 1.8v -- The threshold level is +0.90 volts. • LVCMOS 2.5v -- The threshold level is +1.25 volts. •...
Page 57 Chapter 2: Task Guide Formatting Labels for Logic Analyzer Probes • Or, choose the Insert before or Insert after command, enter the label name, and select the OK button. 2. In the label row, select the button of the pod that contains the channels you want to assign.
Page 58: To Change The Label Polarity
Chapter 2: Task Guide Formatting Labels for Logic Analyzer Probes “To turn labels off or on” on page 58 “To change the label polarity” on page 57 To change the label polarity While negative logic is rare in circuits (the main exception at this time is RAMBUS), you can change the label polarity if the device under test uses negative logic.
Page 59: To Turn Labels Off Or On
Chapter 2: Task Guide Formatting Labels for Logic Analyzer Probes 3. In the Change Bit Order dialog: • To reorder the bits individually, enter the bit that the probe channel should be mapped to. • To swap the high and low order bytes or words, select the button Big Endian to Little Endian at the bottom of the dialog.
Page 60 Chapter 2: Task Guide Formatting Labels for Logic Analyzer Probes The label's data appears in the display windows. Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 61: Setting Up Triggers And Running Measurements
Chapter 2: Task Guide Setting Up Triggers and Running Measurements Setting Up Triggers and Running Measurements The following information is a generic discussion about triggering in logic analyzers. Depending on the logic analyzer type, and the state or timing mode being used, some functionality may not be available. •...
Page 62: Using Trigger Functions
Chapter 2: Task Guide Setting Up Triggers and Running Measurements sequence levels, the question about what to do with the captured data samples. Of course, sometimes it's useful to specify storage qualifiers at certain levels in the trigger sequence. For this, you can insert storage actions in the trigger sequence before trigger or goto actions.
Page 63 Chapter 2: Task Guide Setting Up Triggers and Running Measurements and options. To specify a label pattern event Label pattern events let you specify patterns or ranges on a bus. 1. Select the label name button and choose the label that you want to look for a pattern on.
Page 64 Chapter 2: Task Guide Setting Up Triggers and Running Measurements edge events are only available in certain timing mode trigger functions. 1. Select the label name button and choose the label that you want to look for a pattern on. You can also insert other label events if you want to look for multiple patterns on multiple labels.
Page 65 Chapter 2: Task Guide Setting Up Triggers and Running Measurements To expand a trigger function 1. In the Trigger tab, select the number button of the trigger sequence level whose trigger function you want to expand. 2. Choose Expand function. To compress a trigger function Expanded trigger functions can be compressed back into their original form.
Page 66 Chapter 2: Task Guide Setting Up Triggers and Running Measurements • Insert and break down trigger functions from the loaded library just like normal trigger functions. • Copy trigger function libraries to other logic analysis systems and load them into other logic analyzers that have trigger function library capability. •...
Page 67: Using State Mode Trigger Features
When time or state counts are turned on and all pods are assigned, logic analyzer acquisition memory is halved to 4M samples for the 16718A logic analyzer. Leaving one pod pair unassigned gives you full memory depth. See Also “To assign pods to one or two analyzers”...
Page 68 The Agilent Technologies 16718A logic analyzer does not use the Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 69 Chapter 2: Task Guide Setting Up Triggers and Running Measurements "Branches taken" feature of past logic analyzers. The best way to store only the states that cause sequence level branches is by setting up default storing to Nothing, inserting a Store sample action in each sequence level, and inserting a Turn off default storing action in the level that triggers.
Page 70: To Select Transitional Timing Or Store Qualified
Chapter 2: Task Guide To select transitional timing or store qualified To select transitional timing or store qualified 1. In the Sampling tab with Timing Mode selected, select the Transitional Timing with Store Qualification configuration. Transitional Timing In Conventional Timing Acquisition mode, the analyzer stores measurement data at each sampling interval.
Page 71: More On Store Qualification In Transitional Timing
Chapter 2: Task Guide To select transitional timing or store qualified More on Store Qualification in Transitional Timing When Transitions is selected on the Default Storing subtab, the default store qualification is setup to store data on all channels if an edge/transition occurs on any one channel.
Page 72: Transitional Timing Considerations
Chapter 2: Task Guide To select transitional timing or store qualified happen at this rate, two samples are stored (four at the fastest rate of 2.5 ns) for every transition. Therefore, with 2 K samples of memory, 1 K of transitions are stored. You must subtract one, which is necessary for a starting point, for a minimum of 1023 stored transitions.
Page 73 Chapter 2: Task Guide To select transitional timing or store qualified Sequence level branching In transitional timing, only 2 branches are available per sequence level. Global counters In transitional timing, only one global counter is available. Storing Time Tags Transitional timing requires time tags to recreate the data. Time tags are either stored in the memory resources of an unused pod pair, or they are interleaved with the data in memory.
Page 74: Editing The Trigger Sequence
Chapter 2: Task Guide To select transitional timing or store qualified Editing the Trigger Sequence When you want to trigger on several events in the device under test that follow one another, you need to use multiple levels in the trigger sequence.
Page 75 Chapter 2: Task Guide To select transitional timing or store qualified replace. A yellow box appears around the level. 2. In the Trigger Functions subtab, select the trigger function you want to insert. A picture describing the trigger function is shown. 3.
Page 76 Chapter 2: Task Guide To select transitional timing or store qualified To specify a level's goto or trigger action When using multiple levels in the trigger sequence, you specify the event search order by setting the goto or trigger action in each sequence level.
Page 77 Chapter 2: Task Guide To select transitional timing or store qualified you want to send e-mail on. A yellow box appears around the level. 2. Select the Trigger or Goto button and choose the Trigger, send e-mail, and fill memory action. 3.
Page 78 Chapter 2: Task Guide To select transitional timing or store qualified protocol used in sending and receiving e-mail. A protocol is the special set of rules for communicating the end points in a telecommunication connection as they send signals back and forth. Protocols exist at several levels in a telecommunication connection.
Page 79: Editing Advanced Trigger Functions
Chapter 2: Task Guide To select transitional timing or store qualified Settings (acquisition depth and trigger position) are returned to their defaults. In the state sampling mode, time tags are turned back on. In the timing sampling mode, the sample period returns to its fastest setting. Editing Advanced Trigger Functions After you break down a trigger function (if it didn't quite provide the trigger capability you need), or after you select one of the advanced...
Page 80: To Insert A Store Action (State Mode)
Chapter 2: Task Guide To select transitional timing or store qualified before the associated action is taken. To specify a time duration for events 1. In the Trigger tab's Trigger Sequence area, if the present for > button is not present, select the occurs button and choose present for >. 2.
Page 81: To Insert Timer Actions/Events
Chapter 2: Task Guide To select transitional timing or store qualified “To Specify Default Storing” on page 67 “To specify whether default storing is initially on or off” on page 68 To insert timer actions/events Timers are like stopwatches. You can insert actions to start (from zero), stop (and reset), pause, or resume a timer.
Page 82: To Insert Flag Actions/Events
Chapter 2: Task Guide To select transitional timing or store qualified actions to reset or increment a counter. You can insert counter events in a different sequence level to test the value of a counter. To insert a counter action 1.
Page 83 Chapter 2: Task Guide To select transitional timing or store qualified NOTE: In all but the slowest state speed, the logic analyzer can check flags by inserting an event, but cannot change flag status with an action. Flag actions are not available when not using the slowest state speed. A flag that is set by a module remains set until that module clears it.
Page 84: To Insert A "Reset Occurrence Counter" Action
Chapter 2: Task Guide To select transitional timing or store qualified To insert a flag event Flag events are like other events in that they evaluate to either true or false. You can use the Wait for flag trigger function to insert a flag event. When editing advanced trigger functions, follow these steps to insert a flag event: 1.
Page 85: To Group Events
Chapter 2: Task Guide To select transitional timing or store qualified (for example, Trigger or Goto), choose Insert ACTION, and choose Reset occurrence counter. See Also “To specify a duration or occurrence count for events (timing mode)” on page 78 To group events When you are working with advanced trigger functions (or when you break down other trigger functions) and there are multiple events in an...
Page 86: Saving/Recalling Trigger Setups
Chapter 2: Task Guide To select transitional timing or store qualified To edit a named event 1. In the Trigger tab's Trigger Sequence area, select the named event button and choose Edit locally or Edit globally. Locally means to edit (and rename) this instance of the named event. Globally means to edit all instances of the named event.
Page 87: Running Measurements
Chapter 2: Task Guide To select transitional timing or store qualified If one of the settings in the recalled trigger setup conflicts with the sampling mode configuration, it will be set to the closest setting. Also, if the trigger setup uses a trigger function library that does not exist on this mainframe, it will not load correctly.
Page 88 Chapter 2: Task Guide To select transitional timing or store qualified Run All starts all instruments currently placed in the workspace. To stop a measurement 1. Select the Stop or Stop All button. If nothing happens when you start a measurement •...
Page 89: Displaying Captured Data
Chapter 2: Task Guide Displaying Captured Data Displaying Captured Data Once you have run a measurement and filled the logic analyzer's acquisition memory with captured data, you can display the captured data with one of the display tools. You can use analysis tools to filter data and compare data sets. You can also analyze captured data with toolsets like the Serial Analysis Toolset and the System Performance Analysis Toolset.
Page 90: To Display Timing Zoom Data
Chapter 2: Task Guide Displaying Captured Data Waveform and Listing (and other) display tools provide global markers that can be used to correlate data that is captured by different instrument modules or displayed differently in other display tool windows. The Waveform and Listing display tools also give you the ability to search for particular data values captured on labels.
Page 91: To Use Other Display Tools
Chapter 2: Task Guide Displaying Captured Data • In Waveform displays, Timing Zoom and the regular data are in different windows. To view them together, select Edit -> Insert from the menu bar. • In Waveform displays, if Timing Zoom and regular data do not correspond, check that the display is set to Seconds/div.
Page 92 Chapter 2: Task Guide Displaying Captured Data time. For example, if you use storage qualification (in the state sampling mode) or the Pattern Filter analysis tool, you can chart variable values. You can use the Distribution display tool to show how often different values (among the possible values) are captured on a label.
Page 93: If The Captured Data Doesn't Look Correct
Chapter 2: Task Guide Displaying Captured Data If the captured data doesn't look correct Intermittent Data Check for poor connections, incorrect signal levels on the hardware, Errors incorrect logic levels under the logic analyzer's Config tab, or marginal timing for signals. Unwanted Triggers If you are using an inverse assembler or a pipeline, triggers can be caused by instructions that were fetched but not executed.
Page 94: To Display Symbols For Data Values
Chapter 2: Task Guide Displaying Captured Data Since acquisition memory is cleared at the beginning of a measurement, stopping a run may create a discrepancy between acquisition memory and the memory buffer of connected tools. Without a complete trace of acquisition memory, the display memory will appear to have 'holes' in it which appear as filtered data.
Page 95: To Cancel The Display Processing Of Captured Data
Chapter 2: Task Guide Displaying Captured Data • Select the OK button. The symbolic names for the values now appear in the overlaid bus waveform. To view symbolic values in a listing display 1. Select the numeric base of the label where you want to display symbolic values.
Page 96: Using Symbols
Chapter 2: Task Guide Using Symbols Using Symbols You can use symbol names in place of data values when: • Setting up triggers • Displaying captured data • Searching for patterns in Listing displays • Setting up pattern filters • Setting up ranges in the System Performance Analyzer Symbol names can be: variable names, procedure names, function names, source file line numbers, etc.
Page 97: To Load Object File Symbols
Chapter 2: Task Guide Using Symbols To load object file symbols Object files are created by your compiler/linker or other software development tools. 1. Generate an object file with symbolic information using your software development tools. 2. If your language tools cannot generate object file formats that are supported by the logic analyzer, create an ASCII symbol file (see page 100).
Page 98: To Adjust Symbol Values For Relocated Code
Chapter 2: Task Guide Using Symbols the object file symbols are reloaded. To delete object file symbol files 1. Select the Symbol tab, and then the Object File tab. 2. Select the file name you want to delete in the text box labeled, Object Files with Symbols Loaded For Label.
Page 99: To Create User-Defined Symbols
Chapter 2: Task Guide Using Symbols whose symbols you wish to relocate. 3. Select the Relocate Sections... button. 4. Enter the desired offset in the Offset all sections by field. The offset is applied from the linked address or segment. 5.
Page 100: To Enter Symbolic Label Values
Chapter 2: Task Guide Using Symbols To delete user-defined symbols 1. Under the Symbol tab, select the User Defined tab. 2. Select the label you want to delete symbols from. 3. Select the symbol to delete. 4. Select the Delete button. 5.
Page 101: To Create An Ascii Symbol File
Chapter 2: Task Guide Using Symbols Pattern. • Use the Find Symbols of Type selections to filter the symbols by type. 4. Select the symbol you want to use from the list of Matching Symbols. 5. If you are using object file symbols, you may need to: •...
Page 102: To Create A Readers.ini File
Chapter 2: Task Guide Using Symbols To create a readers.ini file You can change how an ELF/Stabs, Ticoff or Coff/Stabs symbol file is processed by creating a reader.ini file. 1. Create the reader.ini file on your workstation or PC. 2. Copy the file to /logic/symbols/readers.ini on the logic analysis system. Reader options C++Demangle 1= Turn on C++ Demangling (Default)
Page 103 Chapter 2: Task Guide Using Symbols section will be read completely. This can occur if the file was created without a "generate debugger information" flag (usually -g). Using the - g will create a Dwarf or Stabs debug section in addition to the ELF section.
Page 104 Chapter 2: Task Guide Using Symbols MaxSymbolWidth=60 StabsType=2 Example for Coff/Stabs (using Ticoff reader) [ReadersTicoff] MaxSymbolWidth=60 StabsType=2 Example for Ticoff [ReadersTicoff] MaxSymbolWidth=60 ReadOnlyTicoffPage=4 AppendTicoffPage=1 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 105: Printing/Exporting Captured Data
Chapter 2: Task Guide Printing/Exporting Captured Data Printing/Exporting Captured Data To print captured data You can print captured data from display tool windows. 1. In the display tool window, select Print this window from the File menu. To export captured data You can use the File Out tool to save measurement data to an ASCII format file which can then be imported into a spreadsheet application, a debugger, or some other post-processing tool.
Page 106 7. Drag display, analysis, or toolset icons and drop them on the File In tool icon to view the imported data. See Also Printing Windows - Configurations (see the Agilent Technologies 16700A/ B-Series Logic Analysis System help volume) Using the File Out Tool (see the File Out Tool help volume) Using the File In Tool (see the File In Tool help volume) Artisan Technology Group - Quality Instrumentation ...
Page 107: Cross-Triggering
Chapter 2: Task Guide Cross-Triggering Cross-Triggering An instrument must be armed before it can look for a trigger. By default, instruments are set to be armed immediately when you Run the measurement. However, you can set an analyzer instrument to be armed either by the second analyzer within the same instrument (if it's turned on) or by another instrument (in a different slot or frame).
Page 108: To Cross-Trigger With Another Instrument
See Also Intermodule Window (see the Agilent Technologies 16700A/B-Series Logic Analysis System help volume) Group Run Arming Tree (see the Agilent Technologies 16700A/B-Series Logic Analysis System help volume) Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 109: Solving Logic Analysis Problems
1. Disconnect all probes of the logic analyzer module. 2. If you have any work in progress, save it to a configuration file. (see the Agilent Technologies 16700A/B-Series Logic Analysis System help volume) 3. Disconnect all loads, adapters, or analysis probes from the probe cable ends.
Page 110 Chapter 2: Task Guide Solving Logic Analysis Problems If any test fails, contact your local Agilent Technologies Sales Office or Service Center for assistance. See Also Self Test (see the Agilent Technologies 16700A/B-Series Logic Analysis System help volume) Agilent Technologies 16718A 333 MHz State/2 GHz Timing Zoom Service Guide Artisan Technology Group - Quality Instrumentation ...
Page 111: Saving And Loading Logic Analyzer Configurations
Saving and Loading Logic Analyzer Configurations Saving and Loading Logic Analyzer Configurations The Agilent Technologies 16718A logic analyzer settings and data can be saved to a configuration file. The configuration file will include references to any custom trigger libraries you have created, but if the configuration is loaded into an analyzer on a system that does not have the trigger libraries, they will not work correctly.
Page 112 NOTE: The Agilent Technologies 16700A/B logic analysis systems can translate configuration files from Agilent Technologies 16500 and 16505A logic analysis systems if the measurement module is the same. If the modules are different, first load the configuration file into a module of the same model number on the new logic analysis system.
Page 113 Chapter 2: Task Guide Saving and Loading Logic Analyzer Configurations Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 114: Reference
Reference • “The Sampling Tab” on page 115 • “The Format Tab” on page 119 • “The Trigger Tab” on page 146 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 115 Chapter 3: Reference • “The Symbols Tab” on page 159 • “Error Messages” on page 170 • “Specifications and Characteristics” on page 186 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 116: The Sampling Tab
Chapter 3: Reference The Sampling Tab The Sampling Tab The Sampling tab lets you choose between the logic analyzer's asynchronous sampling Timing Mode or its synchronous sampling State Mode. This tab also lets you set controls for the selected mode as well as Timing Zoom options.
Page 117: Timing Mode
Chapter 3: Reference The Sampling Tab Timing Mode When you select Timing Mode, the Timing Mode Controls area appears. Full/Half Channel Configuration Lets you configure the timing analyzer for faster sampling and greater memory depth, but with half the channels. Trigger Position Lets you specify where the sample that triggered the analyzer should appear among all the other samples that are stored in acquisition memory.
Page 118: State Mode
Chapter 3: Reference The Sampling Tab State Mode When you select State Mode, the State Mode Controls area appears. 167 MHz/333 MHz State Speed Configuration Lets you configure the state analyzer for faster sampling, but with clocking restricted to the J clock on Pod 1 of the master card and triggering restricted to two trigger functions.
Page 119 Chapter 3: Reference The Sampling Tab under test) that will enable (qualify) the sampling clock. Generally, the state mode sampling clock is taken from the signals that clock valid data in the device under test. The clock channel specifiers graphically show your clock setup.
Page 120: The Format Tab
Chapter 3: Reference The Format Tab The Format Tab The Format tab lets you assign bus and signal names (from the device under test), to logic analyzer channels. These names are called labels. Labels are used when setting up triggers and displaying captured data. The Format tab also lets you assign pod pairs to one or two logic analyzers, specify the logic analyzer threshold voltage, and adjust the logic analyzer setup/hold (sampling positions).
Page 121 Chapter 3: Reference The Format Tab clock bits span more than one pod pair. See Also “Formatting Labels for Logic Analyzer Probes” on page 53 “To manually adjust sampling positions” on page 46 “To automatically adjust sampling positions” on page 43 “Importing Netlist and ASCII Files”...
Page 122: Importing Netlist And Ascii Files
ASCII netlists created by EDA tools. In order for the feature to work, the device under test must either use the Agilent E5346A high density adapter or the Agilent Technologies Termination Adapter. The adapter must be included as a connector in the netlist.
Page 123 Chapter 3: Reference Importing Netlist and ASCII Files For Example Label1;A2[15:5];A1[5,2] Bus Name Label1 Pod Numbers A2 and A1 [15:5] Channel 15 through Channel 5 ("***********..") [5,2] Channel 5 and Channel 2 ("..*..*..") When setting up the ASCII file a comma (",") separates individual channels, while a colon (":") creates a range of channels.
Page 124: Exporting Ascii Files
Chapter 3: Reference Importing Netlist and ASCII Files Pod A2 Channel 5, and Pod A1 Channel 6. Clocks Label1;CK[AK] Label1 maps to Slot A Clock K. “Importing ASCII Files” on page 123 “Exporting ASCII Files” on page 123 See Also “Termination Adapter”...
Page 125 Chapter 3: Reference Importing Netlist and ASCII Files To Import an ASCII 1. Create an ASCII file for importing into the logic analysis system. For file. example: Lab2;A2[15:10,6,3] NewLabel2;A2[15] Label1;A1[15:0] 2. Select the Format tab. 3. Select File, then select Import Labels... 4.
Page 126: Termination Adapter
Chapter 3: Reference Importing Netlist and ASCII Files Termination Adapter The logic analyzer cable must have the proper RC network at its input in order acquire data correctly. The Termination Adapter incorporates the RC network into a convenient package. It also reduces the number of pins required for the header on the target board from 40 pins to 20.
Page 127: E5346A High Density Adapter
Chapter 3: Reference Importing Netlist and ASCII Files E5346A High Density Adapter The E5346A high-density adapter provides a convenient and easy way to connect an Agilent logic analyzer to the signals on your target system for packages that are difficult to probe. An Amp "Mictor 38" connector must be installed on your target system board.
Page 128: Mapping Connector Names
Chapter 3: Reference Importing Netlist and ASCII Files Mapping Connector Names 1. Select the Format tab. 2. Select File, then select Import Netlist. 3. Select Next to go to the Mapping Connector Names dialog. 4. Enter a connector name from the Netlist. 5.
Page 129: Verify Net To Label Mapping
Chapter 3: Reference Importing Netlist and ASCII Files 2. Select the file from the File Selection dialog box. 3. Select OK 4. Select Next Verify Net to Label Mapping 1. Verify that each net was properly imported into a label. 2.
Page 130: Select/Create Interface Labels
Chapter 3: Reference Importing Netlist and ASCII Files Select/Create Interface Labels Select any additional labels to be copied into the Format tab. Typically there is no need to add any more labels. However, this screen is useful when you want to designate a signal bit in a bus as a separate label name.
Page 131: Pod Assignment Dialog
Chapter 3: Reference Importing Netlist and ASCII Files Pod Assignment Dialog Name: Lets you name the analyzers. Type: Lets you select the timing (asynchronous) sampling mode, the state (synchronous) sampling mode, or turn the analyzer off. Pod Pairs Can be dragged-and-dropped under one of the analyzers to assign those channels to the analyzer or can be left unassigned.
Page 132: Sampling Positions Dialog
Chapter 3: Reference Importing Netlist and ASCII Files Sampling Positions Dialog The Sampling Positions dialog lets you position the logic analyzer's setup/hold window (or sampling position) so that data on high-speed buses is captured accurately, in other words, so that data is sampled when it is valid.
Page 133: Eye Finder Option, Setup Tab
Chapter 3: Reference Importing Netlist and ASCII Files Eye Finder Option, Setup Tab File menu Lets you save/load eye finder data. EyeFinder menu Lets you run eye finder, choose the run mode, and access the “Eye Finder Advanced Settings Dialog” on page 133. Run Mode Lets you look at eye finder with demo data or in normal operating mode by sampling signals from the device under...
Page 134: Eye Finder Advanced Settings Dialog
Chapter 3: Reference Importing Netlist and ASCII Files If a channel appears in multiple labels, selecting that channel will select it in each of those labels. See Also “Understanding State Mode Sampling Positions” on page 208 “To automatically adjust sampling positions” on page 43 Eye Finder Advanced Settings Dialog.
Page 135: Eye Finder Option, Results Tab
Chapter 3: Reference Importing Netlist and ASCII Files Eye Finder Option, Results Tab The Eye Finder Results display is a digital "eye" diagram in that it represents many samples of data captured in relation to the sampling clock. The transitioning edges measured before and after the sampling clock result in a picture that is eye-shaped.
Page 136 Chapter 3: Reference Importing Netlist and ASCII Files Results menu Let you expand/collapse the signals in a label, set the bus view, set the sampling positions to the suggested sampling positions, and remove all eye finder data. Let you expand/collapse the signals in a label, set the bus Label buttons view, choose the suggested sampling position, and show message or time stamp information.
Page 137: Eye Finder Run Messages
Chapter 3: Reference Importing Netlist and ASCII Files How the Selected Position Behaves 1. When eye finder is enabled, the selected position (blue line) is set based on the manual setup/hold value. 2. Whenever the selected position is moved, the manual setup/hold value is also updated.
Page 138 Chapter 3: Reference Importing Netlist and ASCII Files An eye finder measurement is currently running. Stop the eye finder or wait for it to complete before running the eye finder. The eye finder is already running on the other machine defined for this analyzer.
Page 139 Chapter 3: Reference Importing Netlist and ASCII Files "From Eye Finder: After hardware calibration, the sampling positions for the following channels may have shifted out of the selected stable region by the amount shown: CHANNEL: AMOUNT ps ... (NNN more)" Each time a measurement is started, the hardware is re-calibrated.
Page 140: Eye Finder Info Messages
Chapter 3: Reference Importing Netlist and ASCII Files request or when the Sampling Positions dialog is closed or iconified. "Timeout: < N K clocks in 5 sec" Eye finder requires stimulus at a minimum rate to perform its measurements. Too few state clocks were seen in the time allotted. Check clock inputs, clock definition, threshold voltage settings, and the operation of the device under test.
Page 141 Chapter 3: Reference Importing Netlist and ASCII Files 2. The stable region(s) are too small for eye finder to detect. In this case you must resort to adjusting the sample position manually and checking its validity by running an ordinary analyzer measurement to see if the data values you expect are sampled.
Page 142: Eye Finder Load/Save Messages
Chapter 3: Reference Importing Netlist and ASCII Files than 5 nsec and the clock period is greater than 10 nsec (slower than 100 MHz). Eye Finder Load/Save Messages. These messages can appear when saving or loading eye finder data. "... (at line XX in the file)" Indicates where the error occurred in the file being read.
Page 143: Eye Finder Option, File Info Tab
Chapter 3: Reference Importing Netlist and ASCII Files "Failed to open file for reading/writing: NAME" The selected file could not be opened. Check access and file permissions. "File NAME already exists. Overwrite?" The selected file exists. Answering "Yes" will cause the existing contents of the file to be replaced with current eye finder information.
Page 144 Chapter 3: Reference Importing Netlist and ASCII Files File: Name of the eye finder data file. Created: Date and time the eye finder data file was created. Date and time the eye finder data file was last saved. Saved: You are notified if the eye finder data has changed since the last time it was saved.
Page 145: Manual Setup/Hold Option
Chapter 3: Reference Importing Netlist and ASCII Files Manual Setup/Hold Option When you select Manual Setup/Hold, the following options appear. Label Selection List Lets you select the label whose setup/hold window will be positioned. Specifies that the setting is for all bits on the label. All bits Specifies that the setting is for a single bit on the label.
Page 146 Chapter 3: Reference Importing Netlist and ASCII Files position is after the sampling clock. See Also “To manually adjust sampling positions” on page 46 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 147: The Trigger Tab
The Trigger tab is used to tell the analyzer when to capture data. The key event is the trigger. In the Agilent Technologies 16718A logic analyzer, you can insert multiple trigger actions. When you insert multiple trigger actions, the trigger marker in the display windows is placed on the first sample whose evaluation caused a branch through an associated trigger action.
Page 148: Trigger Functions Subtab
Chapter 3: Reference The Trigger Tab • “Save/Recall Subtab” on page 157 See Also “Understanding Logic Analyzer Triggering” on page 192 “Setting Up Triggers and Running Measurements” on page 60 “Editing the Trigger Sequence” on page 73 Trigger Functions Subtab Trigger functions provide a simple way to set up the analyzer to trigger on common events and conditions.
Page 149 Chapter 3: Reference The Trigger Tab General Timing Trigger Functions The following general trigger functions are found in the Trigger Functions tab when the logic analyzer is in the timing sampling mode. You can edit most of the trigger functions to specify particular pattern and edge events.
Page 150 Chapter 3: Reference The Trigger Tab • Find 2 edges too close together Becomes true when the second specified edge occurs within a specified time after the first specified edge. • Find 2 edges too far apart Becomes true when the second specified edge does not occur within a specified time after the first specified edge.
Page 151 Chapter 3: Reference The Trigger Tab • OR Trigger When the logic analyzer is armed by another instrument (as specified in the Intermodule window), this trigger function becomes true when a pattern occurs a specified number of times OR when the arm signal is received.
Page 152 Chapter 3: Reference The Trigger Tab This trigger function has been replaced by the "Store range until pattern occurs" and "Store pattern2 until pattern1 occurs" trigger functions. • Store nothing until pattern occurs Becomes true when the specified pattern occurs one time and doesn't store any samples until then.
Page 153 Chapter 3: Reference The Trigger Tab Becomes true when the specified pattern occurs in the specified number of samples consecutively. • Find pattern2 n times after pattern1, before pattern3 occurs Becomes true when the second specified pattern occurs in a specified number of samples after the the first specified pattern but without the third specified pattern occurring anywhere in between.
Page 154 Chapter 3: Reference The Trigger Tab “To break down a trigger function” on page 63 “To cross-trigger with another instrument” on page 107 “To cross-trigger between two analyzers” on page 106 Advanced Trigger Functions The advanced trigger functions let you create a custom trigger sequence level using events, comparison functions, and up to 4 branches.
Page 155: Settings Subtab
Chapter 3: Reference The Trigger Tab they are specified. The logic analyzer executes the set of actions in the "then" clause associated with the first listed "if" or "else if" clause that becomes true. • Advanced - 4-way branch Like the 3-way branch, but with 3 "Else if" clauses. •...
Page 156: Overview Subtab
Chapter 3: Reference The Trigger Tab Trigger Position Lets you specify where the sample that triggered the analyzer should appear among all the other samples that are stored in acquisition memory. (State mode only). Lets you save time or state count Count information with the captured data samples.
Page 157: Default Storing Subtab
Chapter 3: Reference The Trigger Tab Default Storing Subtab Store by default Lets you specify that Anything, Nothing, Custom, or selected Transitions events be stored by default. At start of acquisition Lets you choose whether default storing is initially On or Off.
Page 158: Status Subtab
Five of the 15 memory positions are reserved for the 5 most recent runs. When you exit your Agilent Technologies 16700 session, the trigger save/recall list is cleared. However, the trigger save/recall list can be saved as part of a configuration file.
Page 159 Chapter 3: Reference The Trigger Tab You can also save trigger sequences outside of configuration files by creating trigger function libraries. See Also “Saving/Recalling Trigger Setups” on page 85 “Saving and Loading Logic Analyzer Configurations” on page 110 “To create a trigger function library” on page 64 Artisan Technology Group - Quality Instrumentation ...
Page 160: The Symbols Tab
Chapter 3: Reference The Symbols Tab The Symbols Tab The Symbols tab lets you load symbol files or define your own symbols. Symbols are names for particular data values on a label. Two kinds of symbols are available: • Object File Symbols. These are symbols from your source code and symbols generated by your compiler.
Page 161 Chapter 3: Reference The Symbols Tab Object file versions During the load process, a symbol database file with a .ns extension will be created by the system. One .ns database file will be created for each symbol file you load. Once the .ns file is created, the Symbol Utility will use this file as its working symbol database.
Page 162: Symbols Selector Dialog
Chapter 3: Reference The Symbols Tab Symbols Selector Dialog Search Pattern: Lets you enter partial symbol names and the asterisk wildcard character (*) to limit the symbols to choose from (see “Search Pattern” on page 162). Use the Recall button to select from previous search patterns.
Page 163 Chapter 3: Reference The Symbols Tab Offset By Lets you add an offset value to the starting point of a symbol. This can be useful when compensating for microprocessor prefetches (see “Offset By Option” on page 162). Lets you mask the lower order bits of a symbol's value. This Align to can be useful for triggering on odd byte boundaries (see “Align to x Byte Option”...
Page 164: Symbol File Formats
Chapter 3: Reference The Symbols Tab func1 and func2 are adjacent to each other in physical memory, with func2 following func1. In order to trigger on func2 without getting a false trigger from a prefetch beyond the end of func1, you need to add an offset value to your label value.
Page 165: General-Purpose Ascii (Gpa) Symbol File Format
Chapter 3: Reference The Symbols Tab C++ notation. To improve performance for these ELF symbol files, type information is not associated with variables. Hence, some variables (typically a few local static variables) may not have the proper size associated with them. They may show a size of 1 byte and not the correct size of 4 bytes or even more.
Page 166 Chapter 3: Reference The Symbols Tab The address or address range must be a hexadecimal number. It must appear on the same line as the symbol name, and it must be separated from the symbol name by one or more blank spaces or tabs. Address ranges must be in the following format: beginning address..ending address The following example defines two symbols that correspond to address...
Page 167 Chapter 3: Reference The Symbols Tab [START ADDRESS] address #comment text Lines without a preceding header are assumed to be symbol definitions in one of the [VARIABLES] formats. Example This is an example GPA file that contains several different kinds of records.
Page 168 Chapter 3: Reference The Symbols Tab NOTE: If you use section definitions in a GPA symbol file, any subsequent function or variable definitions must be within the address ranges of one of the defined sections. Functions and variables that are not within the range are ignored. Format [SECTIONS] section_name...
Page 169 Chapter 3: Reference The Symbols Tab VARIABLES You can specify symbols for variables using: • The address of the variable. • The address and the size of the variable. • The range of addresses occupied by the variable. If you specify only the address of a variable, the size is assumed to be 1 byte.
Page 170 Chapter 3: Reference The Symbols Tab Example [SOURCE LINES] File: main.c 00001000 00001002 0000100A 0000101E See Also Using the Source Viewer (see the Listing Display Tool help volume) START ADDRESS Format [START ADDRESS] address The address of the program entry point, in hexadecimal. address Example [START ADDRESS]...
Page 171: Error Messages
Chapter 3: Reference Error Messages Error Messages • “Analyzer armed from another module contains no "Arm in from IMB" event” on page 185 • “Branch expression is too complex” on page 171 • “Cannot specify range on label with clock bits that span pod pairs” on page 176 •...
Page 172: Must Assign Pod 1 On The Master Card To Specify Actions For Flags
Chapter 3: Reference Error Messages Must assign Pod 1 on the master card to specify actions for flags When using a 16760A analyzer in 200Mb/s state mode, Pod 1 on the master card must be assigned in order to add actions for the flags in a branch action list.
Page 173: Event
Chapter 3: Reference Error Messages NOTE: For labels that do span pod pairs, the complexity can be reduced to the same as that of the non-split label case if all bits in the label on all but one pod pair can be set to Xs in the event list expression for the measurement.
Page 174 Chapter 3: Reference Error Messages • Cannot AND more than 16 non-split pattern events if the pattern events are all on the same pod pair. • Can AND up to 160 non-split pattern events if the pattern events are evenly distributed across all 10 pod pairs on a 5 card set (16 pattern events per pod pair).
Page 175 Chapter 3: Reference Error Messages 1 If (complex event list) occurs 1 time then goto next 2 If anything occurs 1 time then Goto Next 3 If (complex event list) occurs 1 time then Trigger and fill memory • In 333/400 Mb/s State Modes, the trigger sequence compiler must always add some additional complexity to the compiled expression for the first sequence level that is not needed in subsequent sequence levels.
Page 176 Chapter 3: Reference Error Messages Specific Guidelines - 800 Mb/s State Mode • Labels that span pods (split labels) require more combiner resources than labels with bits that all belong to a single pod. Whenever possible, define labels that do not span pods. In some cases, the compiler will be able to combine 2 non-split labels that are ANDed together even though it fails to compile a pattern on a single label that spans pods.
Page 177: Cannot Specify Range On Label With Clock Bits That Span Pod Pairs
Chapter 3: Reference Error Messages combine 2 non-split labels that are ANDed together even though it fails to compile a pattern on a single label that spans pods. • Cannot specify more than 3 patterns or 1 range per pod. Non-split patterns may use operations: =, !=, <, <=,>, >=, In range, Not in range.
Page 178: Counter Value Checked As An Event, But No Increment Action Specified
Chapter 3: Reference Error Messages Counter value checked as an event, but no increment action specified This warning occurs because you have used a counter in your trigger sequence, but do not have Counter Increment as an action. You do not need to increment the counter in the same sequence level.
Page 179: Hardware Initialization Failed
Please go to System Administration Tools and run the Self-Test Utility (see page 108) on the logic analyzer. If you have failures, contact your Agilent Technologies Sales Office for service or software upgrades. Must assign another pod pair to specify actions...
Page 180: No More Pattern Resources Available For This Pod Pair
Chapter 3: Reference Error Messages No more Pattern resources available for this pod pair This error occurs when you have used up all the pattern resources available. Each pod pair has about 28 pattern resources. Some pattern events use more than 1 resource. Possible Solutions •...
Page 181: Slow Or Missing Clock
Chapter 3: Reference Error Messages Slow or Missing Clock The message "Slow or Missing Clock" only appears in state measurements. However, if you have another instrument armed by the state analyzer, a slow or missing clock on the state analyzer will prevent the other instrument from triggering also.
Page 182: Trigger Function Initialization Failure
If there are no bits assigned to the label, the logic analyzer cannot complete the value field. See Also Using the Intermodule Window (see the Agilent Technologies 16700A/B- Series Logic Analysis System help volume) “To assign probe channels to labels” on page 55...
Page 183: Trigger Inhibited During Timing Prestore
Chapter 3: Reference Error Messages Trigger inhibited during timing prestore The "trigger inhibited" informational message appears when you have a logic analyzer making a conventional timing measurement, and it is set to a slow sample rate. The logic analyzer will fill the designated amount of pre-trigger memory before checking for the trigger condition.
Page 184 Chapter 3: Reference Error Messages expressions must be reduced to 16 and the complexity of some of the expressions may have to also be reduced. Branch expressions that are identical (and simple enough to be combined by a single combiner resource) share the same combiner resource.
Page 185: Waiting For Trigger
Chapter 3: Reference Error Messages resources). • An inequality compare (<,<=,>,>=) with a split label pattern event requires 2 combiner resources. • A range on a split label pattern event requires 4 combiner resources. • The event list in the custom store qualification dialog also allocates combiner resources from the same pool of 16 resources.
Page 186: Analyzer Armed From Another Module Contains No "Arm In From Imb" Event
Chapter 3: Reference Error Messages particularly useful when you use store qualifiers to store "no states" (or only the states you are interested in) and the branches taken are stored. • Save the trigger setup, then simplify it to see what part of the sequence does get captured.
Page 187: Specifications And Characteristics
Specifications and Characteristics NOTE: For a complete comparison of all logic analyzer specifications and characteristics refer to the "Agilent Technologies 16700 Series Logic Analysis System Product Overview". • “Agilent 16718A Logic Analyzer Specifications” on page 186 • “Agilent 16718A Logic Analyzer Characteristics” on page 186 •...
Page 188 Chapter 3: Reference Specifications and Characteristics 1-card module 64 data, 4 clock 2-card module 132 data, 4 clock 3-card module 200 data, 4 clock 4-card module 268 data, 4 clock 5-card module 336 data, 4 clock Probes (at end of flying lead set) - Input Resistance: 100 Kohm, +/- 2% - Parasitic Tip Capacitance:...
Page 189 Chapter 3: Reference Specifications and Characteristics Sample period: 3.0 ns to 1 ms Sample period accuracy: +/- (100ps + 0.01% of sample period) Channel-to-channel skew: < 1.5 ns Time interval accuracy: +/- [sample period + (chan- to-chan skew) + (0.01% of time interval)] Minimum data pulse width: 4.0 ns...
Page 190: What Is A Specification
Products shipped from the factory meet all specifications. Additionally, the products sent to Agilent Technologies Customer Service Centers for calibration and returned to the customer meet all specifications. Specifications are verified by Calibration Procedures.
Page 191: What Is A Characteristic
Chapter 3: Reference Specifications and Characteristics referred to as an "operational accuracy calibration". What is a Characteristic? Characteristics describe product performance that is useful in the application of the product, but that is not covered by the product warranty. Characteristics describe performance that is typical of the majority of a given product, but not subject to the same rigor associated with specifications.
Page 192: Concepts
Concepts • “Understanding Logic Analyzer Triggering” on page 192 • “Understanding State Mode Sampling Positions” on page 208 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 193: Understanding Logic Analyzer Triggering
Chapter 4: Concepts Understanding Logic Analyzer Triggering Understanding Logic Analyzer Triggering Setting up logic analyzer triggers can be difficult and time-consuming. You could assume that if you know how to program, you should be able to set up a logic analyzer trigger with no difficulty. However, this is not true because there are many concepts that are unique to logic analysis.
Page 194 Chapter 4: Concepts Understanding Logic Analyzer Triggering placed on the conveyor belt, and at the other end the boxes fall off. In other words, because logic analyzer memory is limited in depth (number of samples), whenever a new sample is acquired the oldest sample currently in memory is thrown away if the memory is full.
Page 195: Summary Of Triggering Capabilities
Chapter 4: Concepts Understanding Logic Analyzer Triggering Special box Trigger point --------------------- ------------------------------ Next: “Summary of Triggering Capabilities” on page 194 Summary of Triggering Capabilities Because logic analyzer triggering provides a great deal of functionality, the following table provides a brief summary of the capabilities covered in this article.
Page 196 Chapter 4: Concepts Understanding Logic Analyzer Triggering edge before it begins looking for the next rising edge. Because there is a sequence of steps to find the trigger, this is known as a trigger sequence. Each step of the sequence is called a sequence level. Each sequence level consists of two parts;...
Page 197 Chapter 4: Concepts Understanding Logic Analyzer Triggering time. Two sequence levels can never be used to specify two events that happen simultaneously. For example, consider the following trigger sequence: 1. If ADDR = 1000 then Go to 2 2. If DATA = 2000 then Trigger If the following samples were acquired, the logic analyzer would trigger on sample #7.
Page 198: Boolean Expressions
Because of this confusion, it is good practice to always use a “Go To” action rather than relying on the default. The new Agilent Technologies 16715/16/17/18/19A state and timing modules deal with this problem by automatically including a “Go To”...
Page 199: Branches
Chapter 4: Concepts Understanding Logic Analyzer Triggering Branches Branches are similar to the Switch statement in the C programming language and the Select Case statement in Basic. They provide a method for testing multiple conditions. Each branch has its own actions.
Page 200: Flags
Chapter 4: Concepts Understanding Logic Analyzer Triggering “not in range” function as well. Ranges are a convenient shortcut so that you don't have to specify “ADDR >= 1000 and ADDR <= 2000”. Next: “Flags” on page 199 Flags Flags are Boolean variables that are used to send signals from one module to another.
Page 201: Timers
Chapter 4: Concepts Understanding Logic Analyzer Triggering be used in place of Global Counters, if possible, because they are easier to use and because there is a limited number of Global Counters. Next: “Timers” on page 200 Timers Timers are used to check the amount of time that has elapsed between events.
Page 202: Storage Qualification
Chapter 4: Concepts Understanding Logic Analyzer Triggering because timer1 will keep running and condition “Timer1 <500 ns” will never be met. There might be another rising edge on SIG1 that is followed within 500ns by the rising edge on SIG2 that occurs later on, so this situation is unacceptable.
Page 203 Chapter 4: Concepts Understanding Logic Analyzer Triggering ADDR In Range 1000 to 2000 By default, the Default Storage is set to store all samples acquired. You can also set the Default Storage to store nothing, which means that no samples will be stored unless a sequence level overrides the default storage.
Page 204: Strategies For Setting Up Triggers
Because the functions cover most common triggers, you can set up your trigger simply by selecting the appropriate function and filling in the data. The Agilent Technologies 16715A logic analyzer trigger user interface is shown in the following figure. Note that trigger functions are prominently located at the top of the screen.
Page 205 Chapter 4: Concepts Understanding Logic Analyzer Triggering The Agilent 16715A trigger user interface Note that a picture (which corresponds to the selected function) is provided to the right of the trigger function list. For example, if you want to trigger when a bus pattern is immediately followed by another bus pattern, you can use the “Find Pattern2 occurring immediately after Pattern1”...
Page 206 Chapter 4: Concepts Understanding Logic Analyzer Triggering The same trigger as If/Then statements Trigger functions can be modified. For example, if you start with the function “Find Edge”, you can add another event, and it becomes the same as “Find Edge and Pattern”. Therefore, a function that is not exactly correct can often be converted into the desired trigger.
Page 207 Chapter 4: Concepts Understanding Logic Analyzer Triggering “Find Edge” and “Find Pattern” together Next: “Setting Up Complex Triggers” on page 206 Setting Up Complex Triggers Frequently, the most difficult part of setting up a complex trigger is breaking down the problem. In other words, how do you map a complex trigger into sequence levels, branches, and Boolean expressions? Here are step by step instructions: 1.
Page 208: Conclusions
Chapter 4: Concepts Understanding Logic Analyzer Triggering different parts of the trigger to describe how they work. Inline documentation on an Agilent logic analyzer Next: “Conclusions” on page 207 Conclusions Setting up logic analyzer triggers is very different than writing software.
Page 209: Understanding State Mode Sampling Positions
Chapter 4: Concepts Understanding State Mode Sampling Positions Understanding State Mode Sampling Positions Synchronous sampling (state mode) logic analyzers are like edge- triggered flip-flops in that they require input logic signals to be stable for a period of time before the clock event (setup time) and after the clock event (hold time) in order to properly interpret the logic level.
Page 210 In Agilent Technologies logic analyzers which have the eye finder feature, you can automatically position the setup/hold window on each Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 211 Chapter 4: Concepts Understanding State Mode Sampling Positions channel in a small fraction of the time (and without the extra test equipment) that it takes to make the adjustments manually. Eye finder is an easy way to get the smallest possible logic analyzer setup/hold window.
Page 212: Glossary
This refers to a single two machines, refers to the machine instrument intended for use in the that is on by default. The default Agilent Technologies 16700A/B- name is Analyzer<N>, where N is series mainframes. One card fills one the slot letter.
Page 213 Glossary pointing device, to click an item, divided into 1K 64-state records. position the cursor over the item. Then quickly press and release the count The count function records periods of time or numbers of state left mouse button. transactions between states stored in clock channel A logic analyzer memory.
Page 214 Glossary instrument tool. Multiple data sets device under test The system can be displayed together when under test, which contains the sourced into a single display tool. The circuitry you are probing. Also known Filter tool is used to pass on partial as a target system.
Page 215 Glossary Using the Touchscreen: emulation probe The stand-alone Position your finger over the item, equivalent of an emulation module. then press and hold finger to the Most of the tasks which can be screen. While holding the finger performed using an emulation down, slide the finger along the module can also be performed using screen dragging the item to a new...
Page 216 (labels) and what logic threshold your signals use. immediate mode In an oscilloscope, the trigger mode that frame The Agilent Technologies or does not require a specific trigger 16700A/B-series logic analysis system condition such as an edge or a mainframe.
Page 217 For example, logic analysis system The Agilent a 5-card Agilent Technologies 16555D Technologies 16700A/B-series would be referred to as Slot C: Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 218 Glossary machine because the master card is monitor When using the Emulation in slot C of the mainframe. The other Control Interface, running the cards of the module are called monitor means the processor is in debug mode (that is, executing the expansion cards.
Page 219 Agilent Technologies 16517A. The Remote displays must be identified to primary branch has an optional the network through an address occurrence count field that can be location.
Page 220 Glossary measurement as part of its data measurements. acquisition cycle. state measurement In a state Sampling Use the selections under measurement, the logic analyzer is the logic analyzer Sampling tab to tell clocked by a signal from the system the logic analyzer how you want to under test.
Page 221 Glossary symbols Symbols represent target system The system under patterns and ranges of values found test, which contains the on labeled sets of bits. Two kinds of microprocessor you are probing. symbols are available: terms Terms are variables that can •...
Page 222 Glossary timing measurement In a timing trace See acquisition. measurement, the logic analyzer samples data at regular intervals trigger sequence A trigger according to a clock signal internal to sequence is a sequence of events that the timing analyzer. Since the you specify.
Page 223 Glossary field. This action allows you to select specific portions of a particular waveform in acquisition memory that will be displayed on the screen. You can view any portion of the waveform record in acquisition memory. Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 224 Numerics break down trigger functions 1.5 ns sample rate analyzer probes, termination breaking down a trigger function 16718A 333 MHz State/2 GHz adapter Timing Zoom Logic Analyzer analyzer shutdown options dialog breaking down trigger functions 16718A characteristics...
Page 225 Index clock channels, inputs available as counters, occurrence and global documenting trigger sequences data clock qualifier counting states duration clock qualifiers, characteristic counting states or time clock setup counting time clock setup area cross-triggering edges clock speeds and sampling cutting-and-pasting trigger editing a named event positions sequence levels...
Page 226 Index evaluation order Find pattern occurring too late functions (trigger), general state event evaluation order after edge trigger function event list, naming functions (trigger), general timing events Find pattern occurring too soon events, counter after edge trigger function functions, trigger events, flag events, grouping Find pattern present/absent for &...
Page 227 Index in symbol browser logic analyzer hangs increment counter logic analyzer probes name, analyzer information, for more logic analyzer triggering, named events input capacitance, probe, understanding naming an event list characteristic logic analyzer, testing negative logic input resistance, probe, LVCMOS threshold level netlist characteristic LVTTL threshold level...
Page 228 Index patterns readers.ini file save/recall list (trigger), clearing pause timer recalling trigger setups performance verification refining measurements Save/Recall subtab period, sample re-importing captured data saving trigger setups pod assignment dialog relocating sections of code Search Pattern field pod clocking, demultiplex renaming labels searching captured data pod pairs, assigning...
Page 229 Index skew, channel-to-channel, states, counting System Performance Analysis characteristic stop timer toolset slave clocks for pods stopping measurements slow clock message storage qualification SMTP store action tab, symbols soft shutdown option store actions temperature characteristics source line numbers Store n samples termination adapters source viewer Store nothing until pattern occurs...
Page 230 Index timing trigger functions trigger setups, saving/recalling Wait for arm in trigger function timing trigger functions, general trigger tab, reference trigger tab, use Wait for flag trigger function Timing Zoom data trigger, poststore timing, memory depth trigger, substeps wait for other machine to trigger transitional timing triggering capabilities, summary transitional timing considerations...
Page 231 Index Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 232 Publication Number: 5988-9034EN January 1, 2003 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 233 Artisan Technology Group is your source for quality new and certified-used/pre-owned equipment SERVICE CENTER REPAIRS WE BUY USED EQUIPMENT • FAST SHIPPING AND DELIVERY Experienced engineers and technicians on staff Sell your excess, underutilized, and idle used equipment at our full-service, in-house repair center We also offer credit for buy-backs and trade-ins •...

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