Mitsubishi Electric Q26UD(E)HCPU User Manual page 573

Number Name Meaning
Stores error
IP address factor when
storage area failing to
SD1298
write error write to IP
factor address
storage area
Stores error
IP address factor when
storage area failing to
SD1299
clear error clear IP
factor address
storage area
Number of
times that
Built-in
data are not
SD1395 Ethernet port
read due to
counter
receive
buffer full
*1 Built-in Ethernet port QCPU and Built-in Ethernet port LCPU
*2 Built-in Ethernet port QCPU whose serial number (first five digits) is "10102" or later
*3 Built-in Ethernet port QCPU whose serial number (first five digits) is "11082" or later
*4 Built-in Ethernet port QCPU whose serial number (first five digits) is "12072" or later
*5 Built-in Ethernet port QCPU whose serial number (first five digits) is "12112" or later
*6 Built-in Ethernet port LCPU whose serial number (first five digits) is "15102" or later
*7 Built-in Ethernet port LCPU whose serial number (first five digits) is "16112" or later
*8 Modules whose serial number (first five digits) is "17052" or later
Explanation
This register stores an error factor occurred when writing to
the IP address storage area (flash ROM). (Links with
SM1294.)
• 0 : No error
H
• 100 : The values of SD1292 to SD1297 are out of the
H
setting range.
• 200 : Write error
H
• 300 : Writing is not available because other function is
H
being executed.
• 400 : Writing is not available because the IP address
H
storage area is being cleared
This register stores an error factor occurred when clearing
the IP address storage area (flash ROM). (Links with
SM1297.)
• 0 : No error
H
• 200 : Clear error
H
• 300 : Clearing is not available because other function is
H
being executed.
• 400 : Clearing is not available because the IP address
H
storage area is being written.
This register stores the number of times that packet data are
not read due to receive buffer full.
Range: 0 to 65535 (0000 to FFFF )
H H
APPENDICES
Corresponding
Set by Corresponding
ACPU
(When Set)
D9
S (Status
New
change)
S (Status
New
change)
S (Status
New
change)
A
CPU
*3
QnU
*6
LCPU
*3
QnU
*6
LCPU
*4
QnU
571