Mitsubishi Electric Q26UD(E)HCPU User Manual page 177

(4) Q03UDVCPU, Q04UDVCPU, Q06UDVCPU, Q13UDVCPU, Q26UDVCPU
Item
Control method
I/O control mode
Sequence control language
Program
language
Process control language
Processing
LD X0
speed
(sequence
MOV D0 D1
instruction)
Processing
speed Tracking execution time
(redundant (increased scan time)
function)
Constant scan
(Function for keeping regular scan time)
*1, *2
Program size
Program memory (drive 0)
Memory card (RAM) (drive 1)
Memory card (SD) (drive 2)
Without an
extended
Standard
SRAM cassette
RAM
With an
Memory (drive 3)
extended
size
SRAM cassette
Standard ROM (drive 4)
CPU
Multiple CPU
shared
high speed
*3
memory transmission
area
*1 The maximum number of executable sequence steps is obtained by the following formula.
(Program size) - (File header size (Default: 34 steps))
For details of the program size and files, refer to the following.
QnUCPU User's Manual (Function Explanation, Program Fundamentals)
*2 When the QnUD(H)CPU or QnUDE(H)CPU is replaced with the QnUDVCPU, the number of steps in the program may
change (increase or decrease).
• For details of the change, refer to the "Precautions for replacing the QnUD(E)(H)CPU with the QnUDVCPU"
section in the following manual.
• For the number of steps of each instruction, refer to the "INSTRUCTION TABLES" chapter in the following
manual.
*3 Data in the CPU shared memory cannot be latched.
Data in the CPU shared memory is cleared when the programmable controller is powered on or the CPU module is
reset.
QCPU User's Manual (Multiple CPU System)
*10 Logic symbolic language cannot be used because GX Works2 does not support this language.
Q03UDVCPU
(Direct access I/O is available by specifying direct access I/O (DX, DY).)
Relay symbol language, logic symbolic language
30K steps
(120K bytes)
120K bytes
Depends on the SD memory card (SD or SDHC type) used. (Max. 32G bytes)
192K bytes
Capacities of the memory in the module + extended SRAM cassette
(The maximum capacity of an extended SRAM cassettes is 8M bytes.)
QnUCPU User's Manual (Function Explanation, Program Fundamentals)
MELSEC-Q/L Programming Manual (Common Instruction)
Universal model QCPU
Q04UDVCPU Q06UDVCPU
Stored program cyclic operation
Refresh mode
MELSAP-L, function block, and structured text (ST)
----
1.9ns
3.9ns
----
0.5 to 2000ms
(Setting available in 0.1ms unit) (Setting by parameters)
40K steps 60K steps
(160K bytes) (240K bytes)
160K bytes 240K bytes
----
256K bytes 768K bytes
1025.5K bytes
8K bytes
32K bytes
CHAPTER 6 CPU MODULE
Q13UDVCPU Q26UDVCPU
*10
, MELSAP3 (SFC),
130K steps 260K steps
(520K bytes) (1040K bytes)
520K bytes 1040K bytes
1024K bytes 1280K bytes
2051K bytes 4102K bytes
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