Mitsubishi Electric Q26UD(E)HCPU User Manual page 533

Number Name Meaning
16 bit
Device modification
assignment of Number of
SD305
(Index points
register) assigned for
Z
SD306 Device Number of
assignment points
(Same as assigned for
SD307
parameter ZR (for
contents) extension)
SD308 Device Number of
assignment points
(assignmen assigned for
t including D (for inside
SD309
the number + for
of points extension)
set to the
SD310
extended
Number of
data
points
register (D)
assigned for
and
W (for inside
SD311
extended
+ for
link register
extension)
(W))
Time
Time
reserved
reserved for
for
SD315 communicati
communica
on
tion
processing
processing
Online
change
(inactive SFC block
SD329
block) number
target block
number
Latch clear Latch clear
SD339 operation operation
setting setting
Explanation
• Stores the number of points of index register (Z) used for the
16-bit modification area. (Depending on the index
modification setting for ZR in the parameter setting.)
• When "Use ZZ" is selected for "Indexing Setting for Device"
in the Device tab of "PLC parameter", FFFF
The number of points for ZR is stored (except the number of
points of extended data register (D) and extended link register
(W)). The number of points assigned to ZR is stored into this
register only when 1k point or more is set for the extended
data register (D) or extended link register (W).
The total points of the data register (D) in the internal device
memory area and the extended data register (D) are stored as
a 32-bit binary value.
The total points of the link register (W) in the internal device
memory area and the extended link register (W) are stored as
a 32-bit binary value.
• This register specifies the amount of processing time for
communication with a programming tool or another module.
• The greater the value specified is, the shorter the response
time for communication with another (such as a
programming tool or serial communication module) is.
However, scan time will increase by the specified time.
• Setting range: 1 to 100ms
A setting outside the above range is regarded as no setting.
• While online change (inactive block) is executed (SM329 is
on.), this register stores the target SFC block number.
• In other than the above status, this register stores FFFF
When 5A01 is set to SD339, SM339 will be valid. After the
H
latch clear processing ends, this register is cleared to 0.
Corresponding
Set by
(When Set)
S (Initial)
is stored.
H
S (Initial)
S (Initial)
U
S (Status
change)
.
H
S (Status
change)/U
APPENDICES
Corresponding
ACPU
CPU
D9
QnU
New
LCPU
*7
QnU
New
LCPU
*7
QnU
New
LCPU
Q00J/Q00/Q01
Qn(H)
New
QnPH
QnPRH
*8
QnU
New
*13
LCPU
*12
QnUDV
New
*11
LCPU
531
A