Mitsubishi Electric Q26UD(E)HCPU User Manual page 535

Number Name Meaning
Number of
SD393 multiple
CPUs
CPU
SD394 mounting
information
Multiple
CPU
system
information
Multiple CPU
SD395
number
No. 1 CPU
SD396 operation
status
No. 2 CPU
SD397 operation
status
No. 3 CPU
SD398 operation
status
No. 4 CPU
SD399 operation
status
*1 Modules whose function version B or later
*2 Universal model QCPU except the Q00UJCPU, Q00UCPU, and Q01UCPU
*3 Universal model QCPU except the Q00UJCPU, Q00UCPU, Q01UCPU, and Q02UCPU
*4 Modules whose serial number (first five digits) is "08032" or later
*5 Modules whose serial number (first five digits) is "09102" or later
*6 Modules whose serial number (first five digits) is "10042" or later
*7 Universal model QCPU except the Q00UJCPU
*8 Modules whose serial number (first five digits) is "12052" or later
*9 Modules whose serial number (first five digits) is "13072" or later
*10 Built-in Ethernet port LCPU whose serial number (first five digits) is "14112" or later
*11 Modules whose serial number (first five digits) is "15042" or later
*12 Modules whose serial number (first five digits) is "15043" or later
*13 Modules whose serial number (first five digits) is "15102" or later (excluding the L02CPU, L02SCPU, L02CPU-P, and
L02SCPU-P)
Explanation
The number of CPU modules that comprise the multiple CPU
system is stored. (1 to 4, Empty also included)
This register stores information on the CPU module types of
CPU No.1 to No.3 and whether or not the CPU modules are
mounted.
b15 b12 b11 b8 b7
to to
SD394 Empty (0) CPU No.3
CPU module mounted or
not mounted
0: Not mounted
1: Mounted
In a multiple CPU system configuration, the CPU number of
the host CPU is stored.
CPU No. 1: 1, CPU No. 2: 2, CPU No. 3: 3, CPU No. 4: 4
The operation information of each CPU No. is stored. (The
information on the number of multiple CPUs indicated in
SD393 is stored.)
b15 b14 to b8 b7 to
Empty Classification Operation status
mounted
0: Not mounted
1: Mounted
0: Normal
1: Minor fault
2: Medium fault
3: Major fault
F : Reset
H
Set by
(When Set)
b4 b3 b0
to
to
CPU No.2 CPU No.1
S (Initial)
CPU module type
0: Programmable
controller CPU
1: Motion CPU
2: PC CPU module
4: C Controller
module
b4 b3 to b0
S (END
processing
error)
0: RUN
2: STOP
3: PAUSE
4: Initial
F : Reset
H
APPENDICES
Corresponding
Corresponding
ACPU
CPU
D9
*1
Q00/Q01
QnU
*1
Q00/Q01
New
*1
Q00/Q01
*1
Qn(H)
QnPH
QnU
*1
Q00/Q01
QnU
*1
Q00/Q01
*7
QnU
*3
QnU
533
A