Mitsubishi Electric Q26UD(E)HCPU User Manual page 599

Number Name Meaning
CH2 external CH2 external
SD1903 I/O status I/O status
monitor monitor
CH2 CH2
operation operation
SD1904
mode mode
monitor monitor
CH2 counter CH2 counter
SD1905
type monitor type monitor
CH2 selected CH2 selected
SD1906 counter counter
function function
CH2 error CH2 error
SD1907
code code
CH2 warning CH2 warning
SD1908
code code
Explanation
• This register stores a value indicating the external I/O
signal status of CH2.
• Unused signal status is fixed at off.
• When Normal Mode is set for Operation Mode Setting
(high-speed counter function parameter), a value
according to the setting configured for Function Input
Logic Setting (high-speed counter function parameter) is
stored in the function input status. Therefore, when a
voltage is applied to the function input terminal while
Negative logic is set for Function input logic setting, this
register turns off.
• When other than A Phase/B Phase is selected for Count
Source Selection (high-speed counter function
parameter), the phase A input status and phase B input
status are fixed at off.
b15 to b7 b6 b5 b4 b3 b2 b1 b0
0 0/1 0/1 0/1 0/1 0/1 0/1 0/1
Phase Z input status
0: OFF
1: ON
Function input status
0: OFF
1: ON
Latch counter input status
0: OFF
1: ON
Phase A input status
0: OFF
1: ON
Phase B input status
0: OFF
1: ON
Coincidence output No.1
0: OFF
1: ON
Coincidence output No.2
0: OFF
1: ON
Fixed to 0.
This register stores a value indicating the operation mode for
high-speed counter of CH2 set by the parameter.
• 0: Unused
• 1: Normal mode
• 2: Frequency measurement mode
• 3: Rotation speed measurement mode
• 4: Pulse measurement mode
• 5: PWM output mode
This register stores a value indicating the counter type for
high-speed counter of CH2 set by the parameter.
Counter selection is disabled (fixed at "0") when a value
stored to CH2 operation mode monitor (SD1904) is other
than "1" (normal mode).
• 0: Linear counter
• 1: Ring counter
This register stores a value indicating the selected counter
function for high-speed counter of CH2 set by the parameter.
Counter selection is disabled (fixed at "0") when a value
stored to CH2 operation mode monitor (SD1904) is other
than "1" (normal mode).
• 0: Count disabling function
• 1: Latch counter function
• 2: Sampling counter function
• 3: Count disabling/preset function
• 4: Latch counter/preset function
This register stores the error code of an error occurred in
CH2.
This register stores the warning code of a warning occurred
in CH2.
APPENDICES
Set by Corresponding Corresponding
(When Set) ACPUD9
S (Every
END New
processing)
S (Every
END New
processing)
S (Every
END New
processing)
S (Every
END New
processing)
S (Every
END New
processing)
S (Every
END New
processing)
CPU
A
LCPU
LCPU
LCPU
LCPU
LCPU
LCPU
597