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10 Serial Peripheral Interface
The serial peripheral interface (SPI) allows the MCU to communicate synchronously with peripheral de-
vices and other microprocessors. The SPI protocol facilitates rapid exchange of serial data between de-
vices in a control system. The MC68HC11F1 and MC68HC11FC0 can be set up for master or slave
operation. Standard data rates can be as high as one half of the E-clock rate when configured as mas-
ter, and as fast as the E-clock when configured as slave.
The MC68HC11FC0 has an additional control bit that allows the SPI baud rate counter to be bypassed.
This allows a master mode baud rate equal to the E-clock frequency.
10.1 SPI Block Diagram
DOTTED LINE CONNECTIONS
PRESENT ON MC68HC11FC0 ONLY
SPIE
SPE
DWOM
MSTR
CPHA
CPOL
SPR1
SPR0
INTERNAL
MCU CLOCK
SPRBYP
MC68HC11F1/FC0
MC68HC11FTS/D
SPI STATUS REGISTER
SPR0
÷2
SPR1
÷4
÷16
÷32
Figure 12 SPI Block Diagram
SPIE
SPI
SPE
CONTROL
MSTR
CLOCK LOGIC
MSB
LSB
8-BIT SHIFT REGISTER
READ DATA BUFFER
SPI INTERRUPT
REQUEST
SS
PD5
M
SCK
PD4
S
S
MOSI
PD3
M
M
MISO
PD2
S
MOTOROLA
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