UNIRD(P)
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
[High Performance model QCPU, Process CPU, Redundant CPU and Universal model
QCPU, L26CPU-BT]
• When n1 is other than 0 to FF
• When n2 is other than 0 to 256
• When a total of n1 and n2 is equal to or greater than 257
[Q00/Q01CPU/L02CPU]
• When n1 is other than 0 to 3F
• When n2 is other than 0 to 64
• When a total of n1 and n2 is equal to or greater than 65
[Q00JCPU]
• When n1 is other than 0 to F
• When n2 is other than 0 to 16
• When n1 and n2 is equal to or greater than 17
[QCPU/LCPU]
• When the number of points specified by n2 for the devices specified in (D) and below is
outside the range of that device.
7-404
H
H
H
(Error code: 4100)
(Error code: 4100)
(Error code: 4100)
(Error code: 4100)
(Error code: 4100)
(Error code: 4100)
(Error code: 4100)
(Error code: 4100)
(Error code: 4100)
(Error code: 4101)