Mitsubishi MELSEC Q Series Programming Manual page 350

UDCNT1
• The counter designated at
is 32767, the present value will become
present value is
performed on the present value is as shown below:
32768
(4) The UDCNT1 instruction triggers counting when the execution command is turned
OFF ON and suspends counting when the execution command is turned ON OFF.
When the execution command is turned OFF ON again, the counting resumes from the
suspended value.
(5) The RST instruction clears the present value of the counter designated at
contact OFF.
Operation Error
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0.
• The device specified by
6-148
is a ring counter. If it is counting up when the present value
D
32768, the present value will become 32767. The count processing
32767 2 1
When counting up
When counting down
1. With the UDCNT1 instruction, the argument device data is registered in the
work area of the CPU module and counting operation is processed as a system
interrupt. (The device data registered in the work area is cleared by turning the
execution command OFF, or turning the STOP/RUN switch STOP RUN.) For
this reason, the pulses that can be counted must have longer ON and OFF
times than the interrupt interval of the CPU module. The interrupt interval of
individual modules is shown below:
CPU Module Type Name
High Performance model QCPU, Process CPU,
Universal model QCPU, LCPU
2. The set value cannot be changed during counting directed by the UDCNT1
instruction (while the execution command is ON). To change the set value, turn
OFF the execution command.
3. Counters which have been designated by the UDCNT1 instruction cannot be
used by other instructions. If they are used by other instructions, they will not be
capable of returning an accurate count.
4. The UDCNT1 instruction can be used as many as 6 times within all the
programs being executed. The seventh and the subsequent UDCNT1
instructions are not processed.
exceeds the range of the corresponding device.
S
32768. Further, if it is counting down when the
0 1 2 32766 32767
Interrupt Interval
and turns the
D
1 ms
(Error code: 4101)