Mitsubishi MELSEC Q Series Programming Manual page 1223

Common instruction 1/2
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Number
Name
Meaning
0: Automatic
SD240
Base mode
mode
1: Detail mode
0: Main base
only
Extension
1 to 7:
SD241
stage number
Extension
stage
number
Base type
differentiation
0: QA**B is
A/Q base
installed
differentiation
(A mode)
1: Q**B is
installed
(Q mode)
Base type
Installed Q
differentiation
base
0: Base not
presence/
installed
absence
1: Q**B is
SD242
installed
Base type
Installed Q
differentiation
base
0: Base not
presence/
installed
absence
1: Q**B is
installed
Explanation
Stores the base mode.
Stores the maximum number of the extension bases being
installed.
b7
b2
b1
b0
Fixed to 0
to
Main base unit
1st extension base
2nd extension base
7th extension base
b4
b2
b1
b0
Fixed to 0
to
b7
b2
b1
b0
Fixed to 0
to
Main base unit
1st extension base
2nd extension base
7th extension base
• For the Q00UJCPU, the bits for the third to seventh extension
bases are fixed to "0".
• For the Q00UCPU, Q01UCPU, and Q02UCPU, the bits for
the fifth to seventh extension bases are fixed to "0".
Set by
(When Set)
Fixed to 0
when the
to
base is not
installed.
S
(Initial)
Main base unit
1st extension base
2nd extension base
to
4th extension base
Fixed to 0
when the
to
base is not
installed.
Corres-
Corres-
ponding
ponding
ACPU
CPU
D9
QCPU
Qn(H)
QnPH
QnPRH
New
Q00J/Q00/
Q01
QnU
App-215
8
8
8
8
A
6
7
8

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