Mitsubishi MELSEC Q Series Programming Manual page 1248

Number Name
b0 , b1, b3, b14
(Default: 0)
0: Do not
Refresh
1: Refresh
processing
selection when
0: Communication
SD778 the COM/
CCOM
instruction is
executed
1: Communication
SD781
to
SD785
Mask pattern of
IMASK Mask pattern
instruction
SD781
to
SD793
SD794
PID limit setting 0: With limit
(for incomplete 1: Without
derivative)
SD794
to
SD795
App-240
Meaning
• Selects whether or not the data is refreshed when the COM,
CCOM instruction is executed.
• Designation of SD778 is made valid when SM775 turns ON.
refresh b15 b14
SD778
b15 bit
with peripheral
device is
executed
with peripheral
device is
nonexecuted
The mask patterns masked by the IMASK instruction are stored
as follows.
The mask patterns masked by the IMASK instruction are stored
*1
as follows.
*1: The Q00UJCPU, Q00UCPU, and Q01UCPU cannot use
SD786 to SD793.
This register stores the limit of each PID loop as shown below.
b15
SD794
This register stores the limit of each PID loop as shown below.
limit
b15
SD794 Loop16
SD795 Loop32
Explanation
to b4 b3 b2 b1 b0
0
I/O refresh
CC-Link refresh
Fixed to 0
Automatic refresh of
intelligent function
modules
Fixed to 0
Communication with
display unit
Execution/non-
execution of
communication with
programming tool
b15 b1 b0
l63
SD781 to l49 l48
l79
SD782 to l65 l64
to to
l127 l113 l112
SD785 to
b15 b1 b0
l63
SD781 to l49 l48
l79
SD782 to l65 l64
to
l255 l241
SD793 to l240
to b8 b7
Loop8 Loop2
to
b1
to Loop2
Loop18
to
Set by
(When
Set)
U
S
(During
execution)
b1 b0
Loop1
U
b0
Loop1
Loop17
Corres-
Corres-
ponding
ponding
ACPU
CPU
D9
LCPU
Q00J/Q00/
Q01
New
Qn(H)
QnPH
QnPRH
QnU
LCPU
Q00J/Q00
*1
/Q01
*4
Qn(H)
QnPRH
QnU
LCPU