Mitsubishi MELSEC Q Series Programming Manual page 1265

Common instruction 1/2
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(16) Redundant system (other system CPU information
The special register (SD1600 to SD1650) is valid when the redundant system is in backup mode and is invalid in
separate mode. The special register (SD1651 to SD1690) is valid when the redundant system is in backup mode
or in separate mode. All bits in SD1600 to SD1690 are set to "0" for stand-alone systems.
Number
Name
Meaning
System error
System error
SD1600
information
information
System
System
SD1601
switching
switching
results
results
System
System
switching
switching
SD1602
dedicated
dedicated
instruction
instruction
parameter
parameter
Other system
Diagnostic
SD1610
diagnostic
error code
error
SD1611
Other system
Diagnostic
diagnostic
SD1612
error
error
occurrence
occurrence
SD1613
time
time
Explanation
• If an error is detected by the error check for redundant
system, the corresponding bit shown below turns on. That bit
turns OFF when the error is cleared after that.
b15
b2
b1 b0
Fixed to 0
SD1600
• If any of b0, b1, b2 and b15 is on, the other bits are off.
• In the debug mode, b0, b1, b2 and b15 are all off.
Reason(s) for system switching is stored.
• When a system is switched, the reason for system switching
is stored in SD1601 of both systems.
• This register is initialized with zero (0) stored when the
system is powered on from off or is reset.
• The following shows the values stored in this register.
•0: Initial value (control system has never been switched)
•1: Power-off, reset, H/W failure, or watchdog timer error
*1
•2: Stop error (except for watchdog timer error)
•3: A system switching request from network module
•16: Control system switching instruction
•17: System switching request from a programming tool
*1: When the system is switched upon the power-off or reset of
the control system, "1" is not stored in SD1601 of the new
standby system.
• This register stores the argument to the instruction when a
system is switched by the SP.CONTSW instruction.(The
argument for the SP.CONTSW instruction is stored in
SD1602 of both systems upon system switching.)
• SD1602 is only valid when "16" is stored in SD1601.
• SD1602 is updated only when a system is switched by the
control system switching instruction.
• This register stores an error code for the error occurred on
other system.
• The value in SD0 of the CPU module on other system is
reflected.
• Stores the date and time when diagnostics error occurred
corresponding to error code stored in SD1610.
• Data format is the same as SD1 to SD3.
• The values in SD1 to SD03 of the CPU module on other
system are reflected.
*1
)
Set by
(When Set)
Each bit
0: OFF
1: ON
Tracking cable is not
connected or damaged
Power-OFF, reset,
watchdog timer error or
hardware failure occurred
S
in other system
(Every END
Other system stop error
(except watchdog timer
processing)
error)
Bit turns on when failing to
connect with other system.
The following causes are
shown below:
Tracking H/W failure
Host system WDT error
Cannot recognize other
system therefore causing
error
S
(when system
is switched)
S
(Every END
processing)
Corres-
Corres-
ponding
ponding
ACPU
CPU
*2
SD
-
QnPRH
SD0
SD1 to
SD3
App-257
8
8
8
8
A
6
7
8

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