Mitsubishi MELSEC Q Series Programming Manual page 1174

Number Name
Selection of
refresh
processing during
SM775
COM/CCOM
instruction
execution
Enable/disable
SM776 local device at
CALL
Enable/disable
SM777 local device in
interrupt program
PID bumpless
processing(for
SM794
incomplete
derivative)
Block information
using multiple
CPU high-speed
SM796 transmission
dedicated
instruction (for
CPU No.1)
Block information
using multiple
CPU high-speed
SM797 transmission
dedicated
instruction (for
CPU No.2)
Block information
using multiple
CPU high-speed
SM798 transmission
dedicated
instruction (for
CPU No.3)
Block information
using multiple
CPU high-speed
SM799 transmission
dedicated
instruction (for
CPU No.4)
App-166
Meaning
OFF : Performs link Select whether link refresh processing will be
refresh performed or not when only communication
ON : Performs no link with the CPU module is made at the
refresh execution of the COM instruction.
OFF : Performs refresh
processes other
Select whether to perform refresh processes
than an I/O
other than an I/O refresh set by SD778 when
refresh
the COM or CCOM instruction is executed.
ON : Performs refresh
set by SD778
OFF : Local device
Set whether the local device of the
disabled
subroutine program called at execution of
ON : Local device
the CALL instruction is valid or invalid.
enabled
OFF : Local device
disabled Set whether the local device at execution of
ON : Local device the interrupt program is valid or invalid.
enabled
Specifies whether to match the set value
OFF : Matched
(SV) with the process value (PV) or not in
ON : Not matched
the manual mode.
This relay turns on when the number of the
remaining blocks in the dedicated instruction
transmission area used for the multiple CPU
OFF : Block is secured high-speed transmission dedicated
ON : Block set by instruction (target CPU= CPU No.1) is less
SD796 cannot be than the number of blocks specified in
secured SD796. This relay is on when an instruction
is executed, and is off while an END
processing is being executed or when free
space is available in the area.
This relay turns on when the number of the
remaining blocks in the dedicated instruction
transmission area used for the multiple CPU
OFF : Block is secured high-speed transmission dedicated
ON : Block set by instruction (target CPU= CPU No.2) is less
SD797 cannot be than the number of blocks specified in
secured SD797. This relay is on when an instruction
is executed, and is off while an END
processing is being executed or when free
space is available in the area.
This relay turns on when the number of the
remaining blocks in the dedicated instruction
transmission area used for the multiple CPU
OFF : Block is secured high-speed transmission dedicated
ON : Block set by instruction (target CPU= CPU No.3) is less
SD798 cannot be than the number of blocks specified in
secured SD798. This relay is on when an instruction
is executed, and is off while an END
processing is being executed or when free
space is available in the area.
This relay turns on when the number of the
remaining blocks in the dedicated instruction
transmission area used for the multiple CPU
OFF : Block is secured high-speed transmission dedicated
ON : Block set by instruction (target CPU= CPU No.) is less
SD799 cannot be than the number of blocks specified in
secured SD799. This relay is on when an instruction
is executed, and is off while an END
processing is being executed or when free
space is available in the area.
Explanation
instruction/END
instruction/END
Corres-
ponding
Set by
Corresponding
ACPU
(When Set)
M9
Q00J/Q00/Q01
Q00J/Q00/Q01
U
Q00J/Q00/Q01
New
S (When
processing
executed)
S (When
New
processing
executed)
CPU
Qn(H)
QnPH
*1
*7
Qn(H)
*4
QnPH
QnPRH
QnU
LCPU
Qn(H)
QnPH
QnPRH
*10
QnU
LCPU
*1
*8
Qn(H)
QnPRH
QnU
LCPU
*9
QnU
*9
QnU