Mitsubishi MELSEC Q Series Programming Manual page 353

• The counter designated at
is 32767, the present value will become
present value is
performed on the present value is as shown below:
32768 32767
(4) Count processing conducted according to the UDCNT2 instruction begins when the count
command goes from OFF to ON, and is suspended when it goes from ON to OFF.
When the execution command is turned OFF to ON again, the counting resumes from the
suspended value.
(5) The RST instruction clears the present value of the counter designated at
contact OFF.
1. With the UDCNT2 instruction, the argument device data is registered in the
2. The set value cannot be changed during counting directed by the UDCNT2
3. Counters designated by the UDCNT2 instruction cannot be used by any other
4. The UDCNT2 instruction can be used as many as 5 times within all the
Operation Error
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0.
• The device specified by
is a ring counter. If it is counting up when the present value
D
32768, the present value will become 32767. The count processing
2 1 0 1 2
When counting up
When counting down
work area of the CPU module and counting operation is processed as a system
interrupt. (The device data registered in the work area is cleared by turning the
execution command OFF, or turning the STOP/RUN switch STOP RUN.) For
this reason, the pulses that can be counted must have longer ON and OFF
times than the interrupt interval of the CPU module. The interrupt interval of
individual modules is shown below:
CPU Module Type Name
High Performance model QCPU, Process CPU,
Universal model QCPU, LCPU
instruction (while the execution command is ON). To change the set value, turn
OFF the execution command.
instruction. If they are used by other instructions, they will not be capable of
returning an accurate count.
programs being executed. The sixth and the subsequent UDCNT2 instructions
are not processed.
exceeds the range of the corresponding device.
S
32768. Further, if it is counting down when the
32766 32767
Interrupt Interval
1 ms
UDCNT2
1
2
3
4
and turns the
D
4
6
7
8
(Error code: 4101)
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