Mitsubishi MELSEC Q Series Programming Manual page 419

(2) When a bit device is designated for
specified by digit specification. The number of bits by which a rotation is executed is the
remainder of n /(specified number of bits).
For example, when n
1 is "7", and the data is rotated 7 bits.
(3) Specify any of 0 to 31 as n. If the value specified as n is 32 or greater, the remainder of n/32
is used for rotation. For example, when n
remainder of 34/32
Operation Error
(1) There are no operation errors associated with the DROL(P) or DRCL(P) instructions.
Program Example
(1) The following program rotates the contents of D0 and D1, not including the carry flag, 4 bits
to the left when XC is ON.
[Ladder Mode]
[Operation]
Carry flag
(SM700)
0
Carry flag
(SM700)
1
Content of b28
before execution
(2) The following program rotates the contents of D0 and D1, including the carry flag, 4 bits to
the left when XC is ON.
[Ladder Mode]
[Operation]
Carry flag
(SM700)
*
Carry flag
(SM700)
1
Content of b28
before execution
, a rotation is performed within the device range
D
31 and (specified number of bits)
1 is "2".
b31 b28b27 b24b23 b20 b19
1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0
b31 b28b27 b24b23 b20 b19
0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1
Contents of b27 to b0
before execution
b31 b28b27 b24b23 b20 b19
1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0
b31 b28b27 b24b23 b20 b19
0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0
Contents of b27 to b0
before execution
: ON/OFF status of the carry flag depends on its status before the execution of DRCL.
*
24 bits, the remainder of 31/24
34, the data is rotated 2 bits to the left since the
[List Mode]
Step Instruction
b16 b15 b12 b11 b8 b7 b4 b3
b16 b15 b12 b11 b8 b7 b4 b3
Contents of b31 to b28
before execution
[List Mode]
Step Instruction
b16 b15 b12 b11 b8 b7 b4 b3
b16 b15 b12 b11 b8 b7 b4 b3
1 1 1
*
Contents of b31 to b29
before execution
Content of carry flag
SM700 before execution
DROL(P),DRCL(P)
Device
b0
D0, D1
b0
D0, D1
Device
b0
D0, D1
b0
D0, D1
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