Data Bus Termination By Assertion Of Tea - Motorola MPC8260 PowerQUICC II User Manual

Part III. The Hardware Interface
CLKOUT
ADDR + ATTR
TS
AACK
DBG
PSDVAL
TA
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Figure 8-10. Burst Transfer to 32-Bit Port Size

8.5.6 Data Bus Termination by Assertion of TEA

If a device initiates a transaction that is not supported by the MPC8260, the MPC8260
signals an error by asserting TEA. Because the assertion of TEA is sampled by the device
only during the data tenure of the bus transaction, the MPC8260 ensures that the device
master receives a qualiÞed data bus grant by asserting DBG before asserting TEA. The data
tenure is terminated by a single assertion of TEA regardless of the port size or whether the
data tenure is a single-beat or burst transaction. This sequence is shown in Figure 8-11. In
Figure 8-11 the data bus is busy at the beginning of the transaction, thus delaying the
assertion of DBG. Note that data errors (parity and ECC) are reported not by assertion of
TEA but by assertion of MCP.
Because the assertion of TEA is sampled by the device only during the data tenure of the
bus transaction, the MPC8260 ensures that the device receives a qualiÞed data bus grant by
asserting DBG before asserting TEA. The data tenure is terminated by a single assertion of
TEA regardless of the port size or whether the data tenure is a single-beat or burst
transaction. This sequence is shown in Figure 8-11. In Figure 8-11 the data bus is busy at
the beginning of the transaction, thus delaying the assertion of DBG.
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