Scc Bisync Transmit Bd (Txbd) - Motorola MPC8260 PowerQUICC II User Manual

Part IV. Communications Processor Module

22.13 SCC BISYNC Transmit BD (TxBD)

The CP arranges data to be sent on an SCC channel in buffers referenced by the channel
TxBD table. The CP uses BDs to conÞrm transmission or indicate errors so the core knows
buffers have been serviced. The user conÞgures status and control bits before transmission,
but the CP sets them after the buffer is sent.
0 1
Offset + 0 R Ñ
Offset + 2
Offset + 4
Offset + 6
Figure 22-7. SCC BISYNC Transmit BD (TxBD)
Table 22-12 describes SCC BISYNC TxBD status and control Þelds.
Table 22-12. SCC BISYNC TxBD Status and Control Field Descriptions
Bits Name
0 R Ready.
0 The buffer is not ready for transmission. The current BD and buffer can be updated. The CP clears R
after the buffer is sent or after an error condition.
1 The user-prepared buffer has not been sent or is being sent. This BD cannot be updated while R = 1.
1 Ñ Reserved, should be cleared.
2 W Wrap (last BD in table).
0 Not the last BD in the table.
1 Last BD in the table. After this buffer is used, the CP receives incoming data into the Þrst BD that
TBASE points to. The number of TxBDs in this table is determined only by the W bit and overall
space constraints of the dual-ported RAM.
3 I Interrupt.
0 No interrupt is generated after this buffer is serviced.
1 SCCE[TXB] or SCCE[TXE] is set after the CP services this buffer, which can cause an interrupt.
4 L Last in message.
0 The last character in the buffer is not the last character in the current block.
1 The last character in the buffer is the last character in the current block. The transmitter enters and
stays in normal mode after sending the last character in the buffer and the BCS, if enabled.
5 TB Transmit BCS. Valid only when the L bit is set.
0 Send an SYN1ÐSYN2 or idle sequence (speciÞed in GSMR[RTSM]) after the last character in the
buffer.
1 Send the BCS sequence after the last character. The controller also resets the BCS generator after
sending the BCS.
6 CM Continuous mode.
0 Normal operation.
1 The CP does not clear R after this BD is closed, so the buffer is resent when the CP next accesses
this BD. However, R is cleared if an error occurs during transmission, regardless of how CM is set.
7 BR BCS reset. Determines whether transmitter BCS accumulation is reset before sending the data buffer.
0 BCS accumulation is not reset.
1 BCS accumulation is reset before sending the data buffer.
22-14
2 3 4 5
W I L TB CM
Tx Data Buffer Pointer
MPC8260 PowerQUICC II UserÕs Manual
6 7 8 9 10
BR TD TR B
Data Length
Description
11 12 13 14 15
Ñ UN CT
MOTOROLA