Motorola MPC8260 PowerQUICC II User Manual page 47

Table
Number
10-12 60x Bus-Assigned UPM Refresh Timer (PURT) .................................................. 10-30
10-13 Local Bus-Assigned UPM Refresh Timer (LURT)............................................... 10-31
10-14 60x Bus-Assigned SDRAM Refresh Timer (PSRT) ............................................. 10-31
10-15 LSRT Field Descriptions ....................................................................................... 10-32
10-16 MPTPR Field Descriptions.................................................................................... 10-32
10-17 SDRAM Interface Signals ..................................................................................... 10-33
10-18 SDRAM Interface Commands............................................................................... 10-35
10-19 SDRAM Address Multiplexing (A0ÐA15)............................................................ 10-37
10-20 SDRAM Address Multiplexing (A16ÐA31).......................................................... 10-38
10-21 60x Address Bus Partition ..................................................................................... 10-48
10-22 SDRAM Device Address Port during activate Command .................................... 10-49
10-23 SDRAM Device Address Port during read/write Command................................. 10-49
10-24 Register Settings (Page-Based Interleaving........................................................... 10-49
10-25 60x Address Bus Partition ..................................................................................... 10-50
10-26 SDRAM Device Address Port during activate Command .................................... 10-50
10-27 SDRAM Device Address Port during read/write Command................................. 10-50
10-28 Register Settings (Bank-Based Interleaving)......................................................... 10-51
10-29 GPCM Interfaces Signals ...................................................................................... 10-51
10-30 GPCM Strobe Signal Behavior.............................................................................. 10-52
10-31 TRLX and EHTR Combinations ........................................................................... 10-58
10-32 Boot Bank Field Values after Reset....................................................................... 10-62
10-33 UPM Interfaces Signals ......................................................................................... 10-62
10-34 UPM Routines Start Addresses ............................................................................. 10-65
10-35 RAM Word Bit Settings ........................................................................................ 10-71
10-36 MxMR Loop Field Usage...................................................................................... 10-76
10-37 UPM Address Multiplexing................................................................................... 10-77
10-38 60x Address Bus Partition ..................................................................................... 10-80
10-39 DRAM Device Address Port during an activate command................................... 10-80
10-40 Register Settings .................................................................................................... 10-80
10-41 UPMs Attributes Example..................................................................................... 10-82
10-42 UPMs Attributes Example..................................................................................... 10-90
10-43 EDO Connection Field Value Example................................................................. 10-92
12-1 TAP Signals ............................................................................................................. 12-2
12-2 Boundary Scan Bit Definition ................................................................................. 12-6
12-3 Instruction Decoding ............................................................................................. 12-29
vii Acronyms and Abbreviated Terms .......................................................................... IV-v
13-1 Possible MPC8260 Applications ............................................................................. 13-3
13-2 Peripheral Prioritization........................................................................................... 13-6
13-3 RISC Controller Configuration Register Field Descriptions................................... 13-8
13-4 RTSCR Field Descriptions .................................................................................... 13-10
13-5 RISC Microcode Revision Number....................................................................... 13-10
13-6 CP Command Register Field Descriptions ............................................................ 13-11
13-7 CP Command Opcodes.......................................................................................... 13-13
MOTOROLA
TABLES
Title
Tables
Page
Number
xlvii