Motorola MPC8260 PowerQUICC II User Manual page 199

Motorola processor users manual
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Acronyms and Abbreviations
Table i contains acronyms and abbreviations used in this document. Note that the meanings
for some acronyms (such as SDR1 and DSISR) are historical, and the words for which an
acronym stands may not be intuitively obvious.
Term
BD
Buffer descriptor
BIST
Built-in self test
BRI
Basic rate interface
CAM
Content-addressable memory
CPM
Communications processor module
CRC
Cyclic redundancy check
DMA
Direct memory access
DPLL
Digital phase-locked loop
DRAM
Dynamic random access memory
DSISR
Register used for determining the source of a DSI exception
EA
Effective address
EEST
Enhanced Ethernet serial transceiver
GCI
General circuit interface
GPCM
General-purpose chip-select machine
HDLC
High-level data link control
2
I
C
Inter-integrated circuit
IDL
Inter-chip digital link
IEEE
Institute of Electrical and Electronics Engineers
IrDA
Infrared Data Association
ISDN
Integrated services digital network
JTAG
Joint Test Action Group
LIFO
Last-in-Þrst-out
LRU
Least recently used
MOTOROLA
Indicates an undeÞned numerical value
NOT logical operator
AND logical operator
OR logical operator
Table vi. Acronyms and Abbreviated Terms
Part III. The Hardware Interface
Part III. The Hardware Interface
Meaning
Part III-iii

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