Motorola MPC8260 PowerQUICC II User Manual page 397

1 Ñ EXTEST | Clamp
0 Ñ Otherwise
Output Control
from System
Logic
Output Enable
from System Logic
Output Data
Input Data
Figure 12-6. General Arrangement of Bidirectional Pin Cells
The control bit value controls the output function of the bidirectional pin. One or more
bidirectional data cells can be serially connected to a control cell. Bidirectional pins include
two scan cell for data (IO.Cell) as shown in Figure 12-6 and these bits are controlled by the
cell shown in Figure 12-5.
It is important to know the boundary scan bit order and pins that are associated with them.
Table 12-2 shows the bit order starting with the TDO output and ending with the TDI input.
The Þrst column of the table deÞnes the bitÕs ordinal position in the boundary scan register.
The shift register cell nearest TDO (Þrst to be shifted in) is deÞned as Bit 1 and the last bit
to be shifted in is bit 475. The second column references one of the three MPC8260Õs cell
types depicted in Figure 12-3 through Figure 12-5 that describe the cell structure for each
MOTOROLA
Shift DR
G1
1
MUX
1
From Last Cell
Figure 12-5. Output Control Cell (IO.CTL)
From Last Cell
I/O.CTL
O.PIN
I.OBS
To Next Cell
Chapter 12. IEEE 1149.1 Test Access Port
Part III. The Hardware Interface
To Next Cell
G1
1
D
MUX
1 C
Clock DR
EN
To Next Pin Pair
To Output
Buffer
D
C
Update DR
I/O
Pin
12-5