Asynchronous Protocols - Motorola MPC8260 PowerQUICC II User Manual

Motorola processor users manual
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RCLK
RXD
(Input)
CD
(Input)
NOTE:
1. GSMR_H[CDS] = 0. CDP=0.
2. If CD is negated prior to the last bit of the receive frame, CD lost is signaled in the frame BD.
3. If CDP=1, CD lost cannot occur and CD negation has no effect on reception.
RCLK
RXD
(Input)
CD
(Input)
NOTE
:
1. GSMR_H[CDS] = 1. CDP=0.
2. If CD is negated prior to the last bit of the receive frame, CD lost is signaled in the frame BD.
3. If CDP=1, CD lost cannot occur and CD negation has no effect on reception.
Figure 19-12. Using CD to Control Synchronous Protocol Reception
If CD is programmed to envelope the data, it must remain asserted during frame
transmission or a CD lost error occurs. Negation of CD terminates reception. If
GSMR_H[CDS] is zero, CD must be sampled by the SCC before a CD lost error is
recognized; otherwise, the negation of CD immediately causes the CD lost condition.
If GSMR_H[CDS] is set, all CD transitions must occur while the Rx clock is low.

19.3.5.2 Asynchronous Protocols

In asynchronous protocols, RTS is asserted when SCC data is loaded into the Tx FIFO and
a falling Tx clock occurs. CD and CTS can be used to control reception and transmission
in the same manner as the synchronous protocols. The Þrst bit sent in an asynchronous
protocol is the start bit of the Þrst character. In addition, the UART protocol has an option
for CTS ßow control as described in Chapter 20, ÒSCC UART Mode.Ó
¥ If CTS is already asserted when RTS is asserted, transmission begins in two
additional bit times.
¥ If CTS is not already asserted when RTS is asserted and GSMR_H[CTSS] = 0,
transmission begins in three additional bit times.
¥ If CTS is not already asserted when RTS is asserted and GSMR_H[CTSS] = 1,
transmission begins in two additional bit times.
MOTOROLA
Chapter 19. Serial Communications Controllers (SCCs)
First Bit of Frame Data
CD Sampled Low Here
First Bit of Frame Data
CD Assertion Immediately
Gates Reception
Part IV. Communications Processor Module
Last Bit of Frame Data
CD Sampled High Here
Last Bit of Frame Data
CD Negation Immediately
Halts Reception
19-21

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