Motorola MPC8260 PowerQUICC II User Manual page 68

Part I. Overview
REG[FIELD]
x
n
Acronyms and Abbreviations
Table iv contains acronyms and abbreviations that are used in this document.
Term
ATM Asynchronous Mode
BD Buffer descriptor
BPU Branch processing unit
COP Common on-chip processor
CP Communications processor
CPM Communications processor module
CRC Cyclic redundancy check
CTR Count register
DABR Data address breakpoint register
DAR Data address register
DEC Decrementer register
DMA Direct memory access
DPLL Digital phase-locked loop
DRAM Dynamic random access memory
DTLB Data translation lookaside buffer
EA Effective address
FCCÔ Fast communications controller
FPR Floating-point register
GPCM General-purpose chip-select machine
GPR General-purpose register
HDLC High-level data link control
2
I C Inter-integrated circuit
IEEE Institute of Electrical and Electronics Engineers
Part I-lxviii
Abbreviations or acronyms for registers or buffer descriptors are
shown in uppercase text. SpeciÞc bits, Þelds, or numerical ranges
appear in brackets. For example, MSR[LE] refers to the little-endian
mode enable bit in the machine state register.
In certain contexts, such as in a signal encoding or a bit Þeld,
indicates a donÕt care.
Indicates an undeÞned numerical value
Table iv. Acronyms and Abbreviated Terms
MPC8260 PowerQUICC II UserÕs Manual
Meaning
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