Signal Descriptions - Motorola MPC8260 PowerQUICC II User Manual

Part III. The Hardware Interface
VCCSYN/GNDSYN/VCCSYN1//VD-
SMI/FRAME/L_A15 <¾¾> 1
CKSTOP_OUT/IRDY/L_A17 <¾¾> 1
CORE_SRESET/RST/L_A28 <¾¾> 1
AD[0–31]/LCL_D[0Ð31] <¾¾> 32
C/BE[0–3]/LCL_DP[0Ð3] <¾¾> 4
LBS[0Ð3]/LSDDQM[0Ð3]/LWE[0Ð3] <¾¾¾ 4
LGPL0/LSDA10 <¾¾¾ 1
LGPL1/LSDWE <¾¾¾ 1
LGPL2/LSDRAS/LOE <¾¾¾ 1
LGPL3/LSDCAS <¾¾¾ 1
LPBS/LGPL4/LUPWAIT/LGTA <¾¾> 1
BNKSEL[0]/TC[0]/AP[1]/MODCK1<¾¾> 1
BNKSEL[1]/TC[1]/AP[2]/MODCK2<¾¾> 1
BNKSEL[2]/TC[2]/AP[3]/MODCK3<¾¾> 1

6.2 Signal Descriptions

The MPC8260 system bus, shown in Table 6-1, consists of all the signals that interface with
the external bus. Many of these pins perform different functions, depending on how the user
assigns them.
6-2
DH/VDD/VSS ¾¾¾>100
PAR/L_A14 <¾¾> 1
TRDY/L_A16 <¾¾> 1
STOP/L_A18 <¾¾> 1
DEVSEL/L_A19 <¾¾> 1
L
IDSEL/L_A20 <¾¾> 1
O
PERR/L_A21 <¾¾> 1
C
A
SERR/L_A22 <¾¾> 1
L
REQ0/L_A23 <¾¾> 1
REQ1/L_A24 <¾¾> 1
GNT0/L_A25 <¾¾> 1
B
GNT1/L_A26 <¾¾¾ 1
U
CLK/L_A27 <¾¾> 1
S
INTA/L_A29 <¾¾> 1
LOCK/L_A30 <¾¾> 1
L_A31 <¾¾> 1
M
E
M
C
LGPL5 <¾¾> 1
LWR <¾¾> 1
PA[0Ð31] <¾¾> 32
P
PB[4Ð31] <¾¾> 28
I
PC[0Ð31] <¾¾> 32
O
PD[4Ð31] <¾¾> 28
PORESET¾¾¾> 1
RSTCONF¾¾¾> 1
HRESET<¾¾> 1
SRESET<¾¾> 1
R
QREQ<¾¾¾ 1
S
T
XFC¾¾¾> 1
CLKIN¾¾¾> 1
C
TRIS¾¾¾> 1
L
K
TERM[0Ð1] ¾¾¾> 2
NC ¾¾¾> 4
Figure 6-1. MPC8260 External Signals
MPC8260 PowerQUICC II UserÕs Manual
32 <¾¾> A[0Ð31]
5 <¾¾> TT[0Ð4]
4 <¾¾> TSIZ[0Ð3]
1 <¾¾> TBST
1 <¾¾> GBL/IRQ1
1 <¾¾> CI/BADDR29/IRQ2
1 <¾¾> WT/BADDR30/IRQ3
1 <¾¾¾ L2_HIT/IRQ4
1 <¾¾> CPU_BG/BADDR31/IRQ5
1 ¾¾¾> CPU_DBG
1 ¾¾¾> CPU_BR
1 <¾¾> BR
1 <¾¾> BG
6
1 <¾¾> ABB/IRQ2
0
1 <¾¾> TS
x
1 <¾¾> AACK
M
1 <¾¾> ARTRY
1 <¾¾> DBG
B
1 <¾¾> DBB/IRQ3
P
U
64 <¾¾> D[0Ð63]
S
1 <¾¾> NC/DP0/RSRV/EXT_BR2
C
1 <¾¾> IRQ1/DP1/EXT_BG2
1 <¾¾> IRQ2/DP2/TLBISYNC/EXT_DBG2
8
1 <¾¾> IRQ3/DP3/CKSTP_OUT/EXT_BR3
1 <¾¾> IRQ4/DP4/CORE_SRESET/EXT_BG3
1 <¾¾> IRQ5/DP5/TBEN/EXT_DBG3
2
1 <¾¾> IRQ6/DP6/CSE0
1 <¾¾> IRQ7/DP7/CSE1
6
1 <¾¾> PSDVAL
1 <¾¾> TA
0
1 <¾¾> TEA
1 <¾¾> IRQ0/NMI_OUT
1 <¾¾> IRQ7/INT_OUT/APE
10 ¾¾¾> CS[0Ð9]
1 <¾¾> CS[10]/BCTL1/DBG_DIS
1 <¾¾> CS[11]/AP[0]
2 ¾¾¾> BADDR[27Ð28]
1 ¾¾¾> ALE
M
1 ¾¾¾> BCTL0
E
8 ¾¾¾> PWE[0Ð7]/PSDDQM[0Ð7]/PBS[0Ð7]
M
1 ¾¾¾> PSDA10/PGPL0
C
1 ¾¾¾> PSDWE/PGPL1
1 ¾¾¾> POE/PSDRAS/PGPL2
1 ¾¾¾> PSDCAS/PGPL3
1 <¾¾> PGTA/PUPMWAIT/PGPL4/PPBS
1 ¾¾¾> PSDAMUX/PGPL5
1 <¾¾- TMS
J
1 <¾¾¾TDI
T
1 <¾¾- TCK
A
1 <¾¾- TRST
G 1 -¾¾> TDO
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