Motorola MPC8260 PowerQUICC II User Manual page 69

Motorola processor users manual
Table of Contents

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Table iv. Acronyms and Abbreviated Terms (Continued)
Term
ISDN
Integrated services digital network
ITLB
Instruction translation lookaside buffer
IU
Integer unit
JTAG
Joint Test Action Group
LRU
Least recently used (cache replacement algorithm)
LSU
Load/store unit
MCC
Multi-channel controller
MII
Media-independent interface
MMU
Memory management unit
MSR
Machine state register
NMSI
Nonmultiplexed serial interface
OEA
Operating environment architecture
OSI
Open systems interconnection
PCI
Peripheral component interconnect
RISC
Reduced instruction set computing
RTC
Real-time clock
RTOS
Real-time operating system
Rx
Receive
SCC
Serial communications controller
SDLC
Synchronous data link control
SDMA
Serial DMA
SI
Serial interface
SIU
System interface unit
SMC
Serial management controller
SPI
Serial peripheral interface
SPR
Special-purpose register
SRAM
Static random access memory
TAP
Test access port
TB
Time base register
TDM
Time-division multiplexed
TLB
Translation lookaside buffer
TSA
Time-slot assigner
MOTOROLA
Meaning
Part I. Overview
Part I. Overview
Part I-lxix

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