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Modem Lines
RXD
Decoder
Delimiter
28.2 General FCC Mode Registers (GFMRx)
Each FCC contains a general FCC mode register (GFMRx) that deÞnes all options common
to every FCC, regardless of the protocol. Some GFMR operations are described in later
sections. The GFMRx are read/write registers cleared at reset. Figure 28-2 shows the
GFMR format.
Bits
0
1
2
Field
DIAG
TCI
Reset
R/W
Addr
Bits
16
17
18
Field
SYNL
RTSM
Reset
R/W
Addr
Figure 28-2. General FCC Mode Register (GFMR)
MOTOROLA
60x Bus
Control
Registers
Peripheral Bus
Receive
Data
FIFO
Receive
Control
Unit
Shifter
Figure 28-1. FCC Block Diagram
3
4
5
6
TRX TTX
CDP
CTSP CDS CTSS
0000_0000_0000_0000
0x11300 (GFMR1), 0x11320 (GFMR2), 0x11340 (GFMR3)
19
20
21
22
RENC
REVD
0000_0000_0000_0000
0x11302 (GFMR1), 0x11322 (GFMR2), 0x11342 (GFMR3)
Chapter 28. Fast Communications Controllers (FCCs)
Part IV. Communications Processor Module
Transmit
Data
FIFO
Shifter
7
8
9
R/W
23
24
25
TENC
TCRC
ENR ENT
R/W
Clock
Generator
Internal Clocks
Transmit
Modem Lines
Control
Unit
Delimiter
Encoder
10
11
12
13
Ñ
26
27
28
29
MODE
TCLK
RCLK
TXD
14
15
30
31
28-3
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