Cmx Scc Clock Route Register (Cmxscr) - Motorola MPC8260 PowerQUICC II User Manual

Part IV. Communications Processor Module
Table 15-5. CMXFCR Field Descriptions (Continued)
Bits Name
10Ð12 RF2CS Receive FCC2 clock source (NMSI mode). Ignored if FCC2 is connected to the TSA (FC2 = 1).
000 FCC2 receive clock is BRG5.
001 FCC2 receive clock is BRG6.
010 FCC2 receive clock is BRG7.
011 FCC2 receive clock is BRG8.
100 FCC2 receive clock is CLK13.
101 FCC2 receive clock is CLK14.
110 FCC2 receive clock is CLK15.
111 FCC2 receive clock is CLK16.
13Ð15 TF2CS Transmit FCC2 clock source (NMSI mode). Ignored if FCC2 is connected to the TSA (FC2 = 1).
000 FCC2 transmit clock is BRG5.
001 FCC2 transmit clock is BRG6.
010 FCC2 transmit clock is BRG7.
011 FCC2 transmit clock is BRG8.
100 FCC2 transmit clock is CLK13.
101 FCC2 transmit clock is CLK14.
110 FCC2 transmit clock is CLK15.
111 FCC2 transmit clock is CLK16.
16 Ñ Reserved, should be cleared
17 FC3 DeÞnes the FCC3 connection
0 FCC3 is not connected to the TSA and is either connected directly to the NMSIx pins or is not
used. The choice of general-purpose I/O port pins versus FCCn pins is made in the parallel I/O
control register.
1 FCC3 is connected to the TSA of the SIs. The NMSIx pins are available for other purposes.
18Ð20 RF3CS Receive FCC3 clock source (NMSI mode). Ignored if FCC3 is connected to the TSA (FC3 = 1).
000 FCC3 receive clock is BRG5.
001 FCC3 receive clock is BRG6.
010 FCC3 receive clock is BRG7.
011 FCC3 receive clock is BRG8.
100 FCC3 receive clock is CLK13.
101 FCC3 receive clock is CLK14.
110 FCC3 receive clock is CLK15.
111 FCC3 receive clock is CLK16.
21Ð23 TF3CS Transmit FCC3 clock source (NMSI mode). Ignored if FCC3 is connected to the TSA (FC3 = 1).
000 FCC3 transmit clock is BRG5.
001 FCC3 transmit clock is BRG6.
010 FCC3 transmit clock is BRG7.
011 FCC3 transmit clock is BRG8.
100 FCC3 transmit clock is CLK13.
101 FCC3 transmit clock is CLK14.
110 FCC3 transmit clock is CLK15.
111 FCC3 transmit clock is CLK16.
24Ð31 Ñ Reserved, should be cleared

15.4.5 CMX SCC Clock Route Register (CMXSCR)

The CMX SCC clock route register (CMXSCR) deÞnes the connection of the SCCs to the
TSA and to the clock sources from the bank of clocks. This register also enables the use of
the external grant pin.
15-14
Description
MPC8260 PowerQUICC II UserÕs Manual MOTOROLA