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Number
21.1
SCC HDLC Features ..........................................................................................21-2
21.2
SCC HDLC Channel Frame Transmission.........................................................21-2
21.3
SCC HDLC Channel Frame Reception ..............................................................21-3
21.4
SCC HDLC Parameter RAM .............................................................................21-3
21.5
Programming the SCC in HDLC Mode .............................................................21-5
21.6
SCC HDLC Commands .....................................................................................21-5
21.7
Handling Errors in the SCC HDLC Controller ..................................................21-6
21.8
HDLC Mode Register (PSMR) ..........................................................................21-7
21.9
SCC HDLC Receive Buffer Descriptor (RxBD)................................................21-8
21.10
SCC HDLC Transmit Buffer Descriptor (TxBD) ............................................21-11
21.11
HDLC Event Register (SCCE)/HDLC Mask Register (SCCM) ......................21-12
21.12
SCC HDLC Status Register (SCCS) ................................................................21-14
21.13
SCC HDLC Programming Examples ...............................................................21-14
21.13.1
SCC HDLC Programming Example #1 .......................................................21-15
21.13.2
SCC HDLC Programming Example #2 .......................................................21-16
21.14
HDLC Bus Mode with Collision Detection .....................................................21-17
21.14.1
HDLC Bus Features .....................................................................................21-19
21.14.2
Accessing the HDLC Bus.............................................................................21-19
21.14.3
Increasing Performance ................................................................................21-20
21.14.4
Delayed RTS Mode ......................................................................................21-21
21.14.5
Using the Time-Slot Assigner (TSA) ...........................................................21-22
21.14.6
HDLC Bus Protocol Programming ..............................................................21-23
21.14.6.1
Programming GSMR and PSMR for the HDLC Bus Protocol ................21-23
21.14.6.2
HDLC Bus Controller Programming Example ........................................21-23
22.1
Features...............................................................................................................22-2
22.2
SCC BISYNC Channel Frame Transmission.....................................................22-2
22.3
SCC BISYNC Channel Frame Reception ..........................................................22-3
22.4
SCC BISYNC Parameter RAM..........................................................................22-3
22.5
SCC BISYNC Commands..................................................................................22-5
22.6
SCC BISYNC Control Character Recognition...................................................22-6
22.7
BISYNC SYNC Register (BSYNC)...................................................................22-7
22.8
SCC BISYNC DLE Register (BDLE)................................................................22-8
22.9
Sending and Receiving the Synchronization Sequence......................................22-9
22.10
Handling Errors in the SCC BISYNC ................................................................22-9
22.11
BISYNC Mode Register (PSMR).....................................................................22-10
xx
CONTENTS
Title
Chapter 21
Chapter 22
MPC8260 PowerQUICC II UserÕs Manual
Page
Number
MOTOROLA
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