Table of Contents
Advertisement
Command
Initializes all receive parameters in the parameter RAM to their reset state. Should be issued only when
INIT RX
the receiver is disabled. The
PARAMETERS
and Rx parameters.
33.7 The SPI Buffer Descriptor (BD) Table
As shown in Figure 33-10, BDs are organized into separate RxBD and TxBD tables in dual-
port RAM. The tables have the same basic conÞguration as for the SCCs and SMCs and
form circular queues that determine the order buffers are transferred. The CP uses BDs to
conÞrm reception and transmission or to indicate error conditions so that the core knows
buffers have been serviced. The buffers themselves can be placed in external memory or in
any unused parameter area of the dual-port RAM.
Dual-Port RAM
Tx Buffer
Pointer to SPI
TxBD Table
Pointer to SPI
RxBD Table
33.7.1 SPI Buffer Descriptors (BDs)
Receive and transmit BDs report information about each buffer transferred and whether a
maskable interrupt should be generated. Each 64-bit BD, shown in Figure 33-11 and
Figure 33-12, has the following structure:
¥ The half word at offset + 0 contains status and control bits. The CP updates the status
bits after the buffer is sent or received.
¥ The half word at offset + 2 contains the data length (in bytes) that is sent or received.
Ñ For an RxBD, this is the number of octets the CP writes into this RxBDÕs buffer
once the BD closes. The CP updates this Þeld after the received data is placed
into the buffer. Memory allocated for this buffer should be no smaller than
MRBLR.
Ñ For a TxBD, this is the number of octets the CP should transmit from its buffer.
Normally, this value should be greater than zero. If the character length is more
MOTOROLA
Table 33-7. SPI Commands (Continued)
INIT TX AND RX PARAMETERS
TxBD Table
Frame Status
Data Length
Buffer Pointer
RxBD Table
Frame Status
Data Length
Buffer Pointer
Figure 33-10. SPI Memory Structure
Chapter 33. Serial Peripheral Interface (SPI)
Part IV. Communications Processor Module
Description
command can also be used to reset both the Tx
External Memory
Tx Buffer
Rx Buffer
33-13
Advertisement
Table of Contents
