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Table 15-6. CMXSCR Field Descriptions (Continued)
Bits
Name
21Ð23 TS3CS
Transmit SCC3 clock source (NMSI mode). Ignored if SCC3 is connected to the TSA (SC3 = 1).
000 SCC3 transmit clock is BRG1.
001 SCC3 transmit clock is BRG2.
010 SCC3 transmit clock is BRG3.
011 SCC3 transmit clock is BRG4.
100 SCC3 transmit clock is CLK5.
101 SCC3 transmit clock is CLK6.
110 SCC3 transmit clock is CLK7.
111 SCC3 transmit clock is CLK8.
24
GR4
Grant support of SCC4
0 SCC4 transmitter does not support the grant mechanism. The grant is always asserted
internally.
1 SCC4 transmitter supports the grant mechanism as determined by the GMx bit of a serial
device channel.
25
SC4
SCC4 connection
0 SCC4 is not connected to the TSA and is either connected directly to the NMSIx pins or is not
used. The choice of general-purpose I/O port pins versus SCCn pins is made in the parallel I/O
control register.
1 SCC4 is connected to TSA of the SIs. The NMSIx pins are available for other purposes.
26Ð28 RS4CS
Receive SCC4 clock source (NMSI mode). Ignored if SCC4 is connected to the TSA (SC4 = 1).
000 SCC4 receive clock is BRG1.
001 SCC4 receive clock is BRG2.
010 SCC4 receive clock is BRG3.
011 SCC4 receive clock is BRG4.
100 SCC4 receive clock is CLK5.
101 SCC4 receive clock is CLK6.
110 SCC4 receive clock is CLK7.
111 SCC4 receive clock is CLK8
29Ð31 TS4CS
Transmit SCC4 clock source (NMSI mode). Ignored if SCC4 is connected to the TSA (SC4 = 1).
000 SCC4 transmit clock is BRG1.
001 SCC4 transmit clock is BRG2.
010 SCC4 transmit clock is BRG3.
011 SCC4 transmit clock is BRG4.
100 SCC4 transmit clock is CLK5.
101 SCC4 transmit clock is CLK6.
110 SCC4 transmit clock is CLK7.
111 SCC4 transmit clock is CLK8
15.4.6 CMX SMC Clock Route Register (CMXSMR)
The CMX SMC clock route register (CMXSMR) deÞnes the connection of the SMCs to the
TSA and to the clock sources from the bank of clocks.
MOTOROLA
Part IV. Communications Processor Module
Description
Chapter 15. CPM Multiplexing
15-17
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