The I C Buffer Descriptor (Bd) Table; C Buffer Descriptors (Bds); I 2 C Buffer Descriptors (Bds) - Motorola MPC8260 PowerQUICC II User Manual

Part IV. Communications Processor Module
34.7 The I C Buffer Descriptor (BD) Table
2
As shown in Figure 34-12, buffer descriptors (BDs) are organized into separate RxBD and
TxBD tables in dual-port RAM. The tables have the same basic conÞguration as for the
SCCs and SMCs and form circular queues that determine the order buffers are transferred.
The CP uses BDs to conÞrm reception and transmission or to indicate error conditions so
that the core knows buffers have been serviced. The buffers themselves can be placed in
external memory or in any unused parameter area of the dual-port RAM.
Dual-Port RAM
Tx Buffer
2
I C TxBD Table
2
I C RxBD Table
2
I C RxBD Table Pointer
(RBASE)
2
I C TxBD Table Pointer
(TBASE)
34.7.1 I 2

C Buffer Descriptors (BDs)

Receive and transmit buffer descriptors report information about each buffer transferred
and whether a maskable interrupt should be generated. Each 64-bit BD, shown in
Figure 34-13 and Figure 34-14, has the following structure:
¥ The half word at offset + 0 contains status and control bits. The CP updates the status
bits after the buffer is sent or received.
¥ The half word at offset + 2 contains the data length (in bytes) that is sent or received.
Ñ For an RxBD, this is the number of octets the CP writes into this RxBDÕs buffer
once the descriptor closes. The CP updates this Þeld after the received data is
placed into the associated buffer. Memory allocated for this buffer should be no
smaller than MRBLR.
Ñ For a TxBD, this is the number of octets the CP should transmit from its buffer.
Normally, this value should be greater than zero. The CP never modiÞes this
Þeld.
¥ The word at offset + 4 points to the beginning of the buffer.
Ñ For an RxBD, the pointer must be even and can point to internal or external
memory.
Ñ For a TxBD, the pointer can be even or odd. The buffer can reside in internal or
external memory.
34-12
TxBD Table
Status and Control
Data Length
Buffer Pointer
RxBD Table
Status and Control
Data Length
Buffer Pointer
2
Figure 34-12. I C Memory Structure
MPC8260 PowerQUICC II UserÕs Manual
External Memory
Tx Buffer
Rx Buffer
MOTOROLA